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Alin Jula

Giuliano Casale

Alexander Froemmgen

Stephan Kraft

Jan Karstens

Methods for performance evaluation of admission control policies (ACPs) include storing a simulation model including an admission queue and a finite capacity region (FCR), the admission queue admitting queries to the FCR based on an active ACP, the FCR modeling a resource constraint, generating traces, each trace being generated based on processing a single query using the database system, the single query being associated with a query type of a plurality of query types, for each query type, determining a query fork size and a service time from an associated trace to provide a plurality of tuples, each tuple being associated with a query type and including the fork size and the service time associated with the query type, parameterizing the simulation model based on the plurality of tuples, and for each of the ACPs, generating a performance parameter by applying a workload to the simulation model.

Simulation techniques for predicting in-memory database systems performance

A topology reader may determine a topology of a Non-Uniform Memory Access (NUMA) architecture including a number of, and connections between, a plurality of sockets, each socket including one or more cores and at least one memory configured to execute a plurality of threads of a software application. A core list generator may generate, for each designated core of the NUMA architecture, and based on the topology, a proximity list listing non-designated cores in an order corresponding to a proximity of the non-designated cores to the designated core. A core selector may determine, at a target core and during the execution of the plurality of threads, that the target core is executing an insufficient number of the plurality of threads, and may select a source core at the target core, according to the proximity list associated therewith, for subsequent transfer of a transferred thread from the selected source core to the target core for execution thereon.

Memory-aware scheduling for NUMA architectures

In a computer system with a multi-core processor, the execution of tasks is scheduled in that a first queue for new tasks and a second queue for suspended tasks are related to a first core, and a third queue for new tasks and a fourth queue for suspended tasks are related to a second core. The tasks have instructions, the new tasks are tasks where none of the instructions have been executed by any of the cores, and the suspended tasks are tasks where at least one of the instructions has been executed by any of the cores. New tasks are popped from the first queue to the first core; and in case the first queue being empty, tasks are popped to the first queue in the following preferential order: suspended tasks from the second queue, new task from the third queue, and new tasks from the fourth queue.

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Mountain View, CA, United States of America

Alin Jula