Telcom Semiconductor, Inc.

Micro Power Systems, Inc.

Precision Monolithics, Inc.

Telecom Semiconductor, Inc.

Ali Tasdighi

Chuong Nguyen

Donald E Alfano

John P Tero

Joseph James Judkins

Jerry M Collings

Roger A Levinson

Quoi V Huynh

John M Caruso

Derek F Bowers

Phong T Nguyen

Sang Ton Ngo

Amado A Caliboso

In the preferred embodiment, the outputs of a plurality of analog signal generators are connected to a single wire (the analog bus). Each analog signal generator is addressable by a unique code provided to its respective address input terminals. A host controller selectively addresses only one of the analog signal generators such that an output of only one of the analog signal generators is applied to the analog bus at a time. In this manner, a single wire may be used to transmit a plurality of analog signals to a receiver. In one embodiment, the receiver is a MUX having an output connected to an ADC.

Multidrop analog signal bus

An apparatus for sensing the rotation of a brushless DC fan includes the fan and a sense/driver circuit and a capacitance. The sense/driver circuit is coupled to the fan to receive a sense input signal including a fluctuating electrical effect caused by fan commutation events. The sense/driver circuit processes the sense input signal to generate a sense output signal indicative of fan operation. The sense/driver circuit includes an integrated circuit. The integrated circuit includes a sense input pin, a ground return pin, a driver circuit, an integrated filter portion, a filter pin and a level detecting circuit. The capacitance is coupled to the filter pin to provide a filter with the integrated filter portion. The driver circuit includes a control terminal, a first current handling terminal coupled to the sense input pin and a second current handling terminal coupled to provide a ground return pat. The integrated filter portion includes a filter input coupled to at least one of the first and second current handling terminals of the driver circuit, and a filter output for providing a filter output signal to the level detecting circuit. The level detecting circuit generates the sense output signal from the filter output signal. The filter derives the filter output signal indicative of the fan commutation events responsive to receiving a signal at the sense input pin.

Verification of fan operation

A programmable low dropout regulator includes an operational amplifier which is used both to provide a bandgap voltage and to drive an output load. In one embodiment implemented in an integrated circuit, external resistors are provided by the user to achieve a user-selected regulated voltage. In that embodiment, an input pin allows the user to select also internal resistors which provide a predetermined regulated voltage.

Low cost programmable low dropout regulator

A temperature-to-voltage converter includes a first circuit for developing a signal having a positive temperature coefficient and a second circuit for developing a signal having a voltage offset and a negative temperature coefficient. The converter also includes an adder circuit configured to subtract the negative-temperature-coefficient signal from the positive-temperature-coefficient signal. The resulting difference signal is a low voltage that exhibits linear temperature-to-voltage conversion, allowing the converter to be powered by a low operating voltage.

Low voltage temperature-to-voltage converter

A voltage detector is described herein which eliminates an entire operational amplifier or comparator from conventional voltage detectors. In one embodiment of such a voltage detector, a band gap reference generator is connected so as not to incorporate any feedback mechanism and where an off balance in the band gap reference generator is used to detect whether an input voltage falls below a threshold voltage. By eliminating the feedback path in the band gap reference generator, a comparator is eliminated. Other types of voltage detectors which provide a highly stable operation over a wide range of temperatures are described.

Voltage detector for battery operated device

An integrated circuit voltage converter containing a capacitive charge pump performing DC to DC conversion is disclosed which detects, either automatically or by an external signal, the onset of a low power consumption situation and switches to a low power consumption mode. In one embodiment, the low power consumption mode is accomplished by reducing the operating frequency of the charge pump. In another embodiment, the switching transistors used to switch the capacitors in the charge pump during a low power consumption mode are smaller than those transistors used to switch the capacitors during its normal operating mode. In another embodiment, the DC to DC converter switches back and forth between a high frequency (burst) mode and a low frequency (low power) mode at intervals. In another embodiment, a combination of the power reduction techniques is used. Various techniques for detecting when a low power consumption mode is appropriate are also described.

Power saving technique for battery powered devices

A short-circuit protection circuit senses the output current of an output transistor to provide a control signal to a control transistor. The control transistor, in response to the control signal, varies an input voltage to an internal stage of an amplifier driving the output transistor, so as to cause the output transistor is switched off. A hysteresis resistor is coupled in series with an input terminal of the short circuit protection circuit, so as to prevent transient noise from switching off said output transistor.

Short-circuit protection circuit

A charge pump circuit including two transfer capacitors, two reservoir capacitors and a plurality of switches. The transfer capacitors are charged to Vin when the charge pump circuit is in a first operating state, the transfer capacitors are connected in a first series arrangement to apply a +2 Vin charge to one of the reservoir capacitors when the charge pump circuit is in a second operating state, and the transfer capacitors are connected in a second series arrangement to apply a -2 Vin charge to the other of the reservoir capacitors when the charge pump circuit is in a third operating state. A control circuit is provided to control the plurality of switches such that the charge pump circuit enters the first through third operating states is a predetermined sequence.

Charge pump circuit having independent inverted and non-inverted

A fixed and a user adjustable voltage reference is alternatively provided by an integrated switch which switches between two current sources according to an input voltage. A fixed reference voltage is achieved by amplifying the current of one of the two current sources according to a predetermined voltage difference between the output terminal and an internal reference voltage. An adjustable reference voltage is achieved by amplifying the current of other of the two current sources according to a voltage difference between the internal reference voltage and an user adjustable voltage. In one embodiment, the user adjustable voltage is achieved by a user adjustable voltage divider circuit.

Integrated switch for selecting a fixed and an adjustable voltage

A digital to analog converter employs an operational amplifier as an active summing device for summing a first analog voltage corresponding to most significant bits of a digital value and a second analog voltage corresponding to least significant bits of the digital value. In a multi-channel application, a single MSB DAC can be shared by all channels through first MUXs in each channel with each channel having an independent LSB DAC. Alternatively, a single LSB DAC can be shared by all channels through second MUXs in each channel. Gain of the voltage summing operational amplifier in each channel is determined by values of a resistor connecting the output of the LSB DAC to the inverting negative input of the operational amplifier and of a feedback resistor connecting the amplifier output to the inverting negative input.

Multi-channel digital to analog converter

A digital to analog converter (DAC) incorporates a novel subranging voltage output DAC that delivers high multiplying bandwidth while consuming low power and requires small silicon area. The higher order digital input bits (MSBS) select a voltage range (VMSB) from a first resistor divider DAC network. The VMSB is then applied to the input of a small high speed low power differential input single ended output LSB programmable attenuator amplifier. Transistor follower devices effectively buffer the MSB section to the LSB section and increase bandwidth and speed of operation as well as permitting multichannel sharing of a single precision MSB voltage divider network.

Digital to analog converter having high multiplying bandwidth

A temperature insensitive voltage reference is described which can advantageously be implemented using standard CMOS processing techniques. A pair of parasitic bipolar transistors are coupled with appropriate resistors to produce a voltage with a temperature coefficient that is equal in value but of opposite polarity to a zener diode voltage-temperature coefficient. This voltage is then combined with a zener diode voltage to yield the desired output reference voltage.

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San Jose, CA, United States of America

Ali Tasdighi