Advanced Micro Devices Corporation

Ati Technologies Ulc

Ali Ibrahim

Paul Blinzer

Stephen David Presant

Krishna Sitaraman

Ashwini Dwarakanath

Vydhyanathan Kalyanasundharam

Alexander J Branover

Maurice B Steinman

Brian D Emberling

Benjamin T Sander

Oleksandr Khodorkovsky

Andrew William Lueck

Walter G Fry

Francisco Leonel Duran

Ming L So

Phil Mummah

Krishna Sai Bernucho

Gary H Simpson

Daniel Parrenas Shimizu

Jeffrey Herman

Mom-Eng Ng

Jeff Herman

Jia An Huang

Seth Hendrickson

Laura M Smith

Dan P Shimizu

Xiaogang Zheng

A processing system includes a first socket, a second socket, and an interface between the first socket and the second socket. A first memory is associated with the first socket and a second memory is associated with the second socket. The processing system also includes a controller for the first memory. The controller is to receive a first request for a first memory transaction with the second memory and perform the first memory transaction along a path that includes the interface and bypasses at least one second cache associated with the second memory.

Caching policies for processing units on multiple sockets

A processor includes a processor core and a power management controller operable to receive a timer event, store the timer event, generate a hardware system sleep command to enter a hardware system sleep state, and restore the timer event upon exiting from the hardware system sleep state.

Method and apparatus for transitioning a system to an active disconnect state

Briefly, a method and apparatus adjusts the power consumption level of an integrated circuit by dynamically scaling the clock frequency based on the real-time determined power consumption level. In one example, the method and apparatus changes an actual clock frequency of the integrated circuit to an effective clock frequency based on the maximum clock frequency and the difference between the threshold power consumption level and the actual power consumption level of the integrated circuit in the previous sampling interval. In one example, an effective clock frequency of the integrated circuit in the current sampling interval is determined. In one example, the difference between the maximum and effective clock frequencies in the current sampling interval is proportional to the difference between the threshold and actual power consumption levels in the previous sampling interval. The actual clock frequency of the integrated circuit is changed to the determined effective clock frequency.

Method and apparatus for adjusting power consumption level of an integrated circuit

Methods and apparatuses are provided for power control in a processor. The apparatus comprises a plurality of operational units arranged as a group of operational units. A power consumption monitor determines when cumulative power consumption of the group of operational units exceeds a threshold (e.g., either or both of the cumulative power threshold and the cumulative power rate threshold) during a time interval, after which a filter for issuing instructions to the group of operational units suspends instruction issuance to the group of operational units for the remainder of the time interval. The method comprises monitoring cumulative power consumption by a group of operational units within a processor over a time interval. If the cumulative power consumption of the group of operational units exceeds the threshold, instruction issuance to the group of operational units is suspended for the remainder of the time interval.

Processor with power control via instruction issuance

An integrated circuit comprising a plurality of functional blocks, each functional block being operative to cause one or more power consuming events, each power consuming event being associated with a respective weight. The integrated circuit also comprises at least one accumulation block for monitoring the functional blocks over a time window and generating a weighted count of the number of occurrences of each power consuming event within the time window; and a power calculation module for calculating a runtime power consumption estimate over the time window using the weighted count. The weighted count may comprise a sum of products of each one of the power consuming events by its respective weight. Calculating the runtime power consumption estimate may comprise averaging the weighted count over the time window to generate a dynamic power estimate, calculating a leakage power estimate over the time window, and summing the dynamic power estimate with the leakage power estimate. The integrated circuit may further comprise a power management module for adapting power consumption of the integrated circuit based on a comparison of the runtime power consumption estimate with one or more predetermined thresholds.

Realtime power management of integrated circuits

A method of operating a device is provided. The method includes transitioning the GPU to a substantially disabled state in response to a first received signal, and generating, while the GPU is in the substantially disabled state, a response signal in response to a second received signal. The response signal is substantially similar to a second response signal that would be generated by the GPU in a powered state in response to the second received signal.

Method and apparatus for responding to signals from a disabling device while in a disabled state

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Oakland, CA, United States of America

Ali Ibrahim