Philips Electronics North America Corporation

North American Philips Corporation

Pri Research & Development Corp.

Ali Fotowat-Ahmady

Nasrollah S Navid

Farbod Behbahani

Charles James Persico

Alireza Mehrnia

Kaveh Shakeri

Dan Linebarger

Ali A Eftekhar

Mehran Ali-Ahmad

Nasrollah Saeed Navid

Massoumeh Nassiri

Ali Tabatabai

One embodiment of the present invention includes a first memory, an address counter, and an adder. The first memory having KN locations stores K sums of mixer samples during an epoch interval. The mixer samples are generated at a first clock frequency from a mixer for N channels corresponding to N satellites in a global positioning system (GPS) receiver. The address counter generates an address modulo-KN corresponding to a first location in the memory at the first clock frequency. The adder adds one of the mixer samples to contents of the first location to generate a sum. The sum is written into the first location.

Efficient epoch processing in multichannel global positioning system signal receiver

An RF mixer utilizing frequency and bias compensation for improved performance characteristics. The RF mixer receives bias signals that are dependent on V.sub.CC levels to internally balance the local oscillation received and mix the perfectly bias balanced internally generated oscillation signal with the RF input.

Low voltage temperature and V.sub.cc compensated RF mixer

A method and a circuit for self-calibration and testing QPSK transmitter/receiver IC's is provided. The method and circuit enable variable error parameters such as gain mismatch, offset voltages, and phase errors inherent in the circuit and signals to be measured and taken into account by the digital signal processors for minimum bit error rates during cellular communications.

Method and apparatus for self-calibration and testing of ZPSK

A high-speed/high-slew-rate tri-modal all bipolar buffer/switch includes a unity-gain amplifier, a voltage source, and a maximum level detector and a minimum level detector adjusting a current source to sink or source current as required to quickly make the output voltage of the switch equal to the input voltage of the switch. The maximum level detector and the minimum level detector compare the output voltage to the input voltage. If the output voltage does not equal the input voltage, the current source acts as either a sink or source to make the output voltage equal the input voltage. In addition, the voltage switch holds a constant d.c. voltage at the output of the switch when the switch is powered down.

High-speed/high-slew-rate tri-modal all bipolar buffer/switch and method

Self-oscillation of a prescalar circuit is avoided by including offset generators on the inputs of the prescalar circuit. This ensures that when the transistors in one differential pair in the prescalar circuit transition from ON to OFF, the other differential pair of transistors will not transition. As a result, spikes are prevented in the differential pair that does not have a transition. A quadrature signal generator constructed with such a prescalar circuit provides an accurate output despite weak or non-existent input signals.

Quadrature signal generator with spike-less prescalar circuit

A new addition to log amplifiers for received signal strength indication in cellular telephony and telecommunications applications extends the large signal end of the signal strength curve by adding rectifiers to the input of an intermediate frequency amplifier, without degrading the noise figure or impedance characteristics thereof. The new addition to log amplifier outputs a signal which is linearly related to an input signal to the log amplifier.

Dynamic range extension of a log amplifier with temperature and process

A comparator has a simple high frequency signal path from input to output formed by two differentially connected transistors with an output transistor connected to each. A current control circuit maintains a constant total current flowing through the differentially connected transistors. The ratio of currents flowing through the differentially connected transistors is initially set by a control circuit, so that the output of the comparator is predictable when powered up. The control circuit then gradually releases control, so that there is a smooth transfer to control by a reference signal input to the comparator.

Comparator with smooth start-up for high frequencies

An IF limiting amplifier uses localized positive feedback in each amplifier stage to provide additional small signal gain while maintaining the limiting gain. The extra small signal gain results in higher overall sensitivity for the receiver at less bias current. The reduction in the number of stages needed to perform the same signal response results in a significant decrease in power consumption by the circuit.

IF amplifier/limiter with positive feedback

An electronic circuit with a logarithmic detector performs the following operations: receiving an input voltage, generating a series of subsequently amplified versions of the input voltage, rectifying the versions, thereupon rescaling and converting the versions into currents, summing the currents and applying the summed current to a resistor. With regard to the prior art the order of rectification and rescaling has been interchanged. As a result, the design is simplified, the circuit's supply voltage is lower than that of the prior art, and the circuit is more accurate and easier to compensate for temperature dependence.

Low voltage, simplified and temperature compensated logarithmic detector

An IF amplifier/log detector with a modular architecture includes a plurality of voltage amplifiers, a plurality of rectifiers, a plurality of voltage-to-current converters and a current summing circuit. Each amplifier has a first differential transistor pair driven by a first current proportional to the temperature to fix the gain. Each converter includes a second differential transistor pair driven by a current proportional to the temperature and inversely proportional to a process parameter, and a third differential transistor pair driven by a third current inversely proportional to the process parameter. In this manner a circuit having improved performance with variations in temperature and process parameters is obtained.

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San Rafael, CA, United States of America

Ali Fotowat-Ahmady