Freescale Semiconductor,inc.

Nxp Usa, Inc.

Alfredo Olmos

Stefano Pietri

Andre Luis Vilas Boas

Fabio De Lacerda

Fabio Duarte De Martin

Jefferson Daniel De Barros Soldera

Eduardo Ribeiro Da Silva

Edgar Mauricio Camacho Galeano

Ricardo Maltione

James Robert Feddeler

Ricardo Pureza Coimbra

Miten H Nagda

André Luis Vilas Boas

André L R Mansano

Sanjay Kumar Wadhwa

Michael Todd Berens

Chris C Dao

David Russell Tipple

Jehoda Refaeli

Jader Alves De Lima Filho

Marcos Augusto De Goes

Sheng Wei Lin

Andre Luis L Vilas Boas

Gang Qian

A method and apparatus for limiting access to an integrated circuit (IC) upon detection of abnormal conditions is provided. At least one of abnormal voltage detection, abnormal temperature detection, and abnormal clock detection are provided with low power consumption. Both abnormally low and abnormally high parameter values (e.g. abnormally low or high voltage, temperature, or clock frequency) may be detected. Abnormal clock detection may also detect a stopped clock signal, including a clock signal stopped at a low logic level or at a high logic level. Furthermore, abnormal clock detection may detect an abnormal duty cycle of a clock signal. A sampled bandgap reference may be used to provide accurate voltage and current references while consuming a minimal amount of power. Upon detection of an abnormal parameter value, one or more tamper indications may be provided to initiate tampering countermeasures, such as limiting access to the IC.

Method and apparatus for limiting access to an integrated circuit (IC)

A resistor-less amplifying circuit includes a plurality of resistor-less cells. Each cell includes a plurality of MOS transistors. Each cell generates a differential output equal to &#x394;Vof two MOS transistors with a magnitude of the differential output controlled by a control voltage generated by a differential amplifier coupled to a feedback loop around a cell. In one embodiment, the resistor-less amplifying circuit is a part of a bandgap voltage reference circuit. In another embodiment, the resistor-less amplifying circuit is part of a temperature sensor circuit.

Low power circuit for amplifying a voltage without using resistors

Systems and methods for low-power voltage tamper detection are described. In some embodiments, an integrated circuit may include source-follower circuitry configured to produce a scaled down supply voltage. The integrated circuit may also include undervoltage detection circuitry coupled to the source-follower circuitry, the undervoltage detection circuitry configured to output a first signal having a first logic value if the scaled down supply voltage is greater than a low threshold voltage or a second logic value if the scaled down supply voltage is smaller than the low threshold voltage. Additionally or alternatively, the integrated circuit may include overvoltage detection circuitry coupled to the source-follower circuitry, the overvoltage detection circuitry configured to output a second signal having the first logic value if the scaled down supply voltage is smaller than a high threshold voltage or the second logic value if the scaled down supply voltage is greater than the high threshold voltage.

Low-power voltage tamper detection

Systems and methods for amplitude loop control for oscillators. In some embodiments, an electronic circuit may include oscillator circuitry configured to produce a periodic signal, and control circuitry operably coupled to the oscillator circuitry, the control circuitry including switched capacitor circuitry configured to determine a difference between maximum and minimum peak voltage values of the periodic signal, the control circuit configured to control a voltage amplitude of the periodic signal based upon the difference. In other embodiments, a method may include receiving a clock signal from a clock generator, determining, using a switched capacitor circuit, a first peak voltage value of the clock signal, determining, using the switched capacitor circuit, a second peak voltage value of the clock signal, and controlling a bias current applied to the clock generator based upon a difference between the first and second peak voltage values.

Amplitude loop control for oscillators

A low voltage detector () includes a power supply voltage monitor circuit () that produces a voltage Vrelated to a first a power supply voltage, and a voltage generator (), which includes a plurality of self-cascode MOSFET (SCM) structures (-) in a cascade configuration, that generates a reference voltage V. A voltage comparator () outputs an output signal in response to a differential between Vand V, wherein Vand Vhave proportional to absolute temperature behavior (PTAT) over temperature with respect to a second power supply voltage. The output signal changes state when the first power supply voltage equals a trip point of the comparator. Each SCM structure is sized to provide a rate of change with temperature of the PTAT behavior of Vthat matches a rate of change with temperature of the PTAT behavior of V.

Low voltage detector

An integrated circuit probing structure () is provided for evaluating functional circuitry (), such as a slow slew-rate square wave signal from a low power circuit, where the probing structure includes two or more probe pads () for testing the functional circuitry which are formed to be electrically separate from one another, and a probe test circuit () connected to the functional circuitry () for conveying a signal from the functional circuitry to a probe needle () only when the probe needle () electrically connects the two or more probe pads ().

Probing structure for evaluation of slow slew-rate square wave signals in low power circuits

A process of forming an electronic device can include forming a capacitor dielectric layer over a base region, wherein the base region includes a base semiconductor material, forming a gate dielectric layer over a substrate, forming a capacitor electrode over the capacitor dielectric layer, forming a gate electrode over the gate dielectric layer, and forming an input terminal and an output terminal to the capacitor electrode. The input terminal and the output terminal can be spaced apart from each other and are connected to different components within the electronic device. A filter can include the base region, the capacitor dielectric layer, and the capacitor electrode. A transistor structure can include the gate dielectric layer and the gate electrode. An electronic device can include a low-pass filter and a transistor structure, such as an n-channel transistor or a p-channel transistor.

Process of forming an electronic device including a resistor-capacitor filter

A regulator () for a charge pump () includes a clock amplitude modulator () that changes voltage of a clock signal used in operation of the charge pump in response to changes in magnitude of output voltage of the change pump. The clock amplitude modulator is powered by an output of an auxiliary circuit (). The output of the auxiliary circuit is at a higher voltage than an input voltage of the charge pump. A maximum amplitude of the voltage of the clock signal is higher than the input voltage of the charge pump.

Charge pump voltage regulator

A method includes driving a current through a touch screen that is based on contact of the touch screen, generating a proportional second current, and detecting contact of the touch screen from the second current. Another method includes providing a touch screen with parallel plates, disabling contact detection when a plate voltage is lower than a threshold voltage, and enabling contact detection when the plate voltage is at least equal to the threshold voltage. A device includes a first node and a second node coupled to a touch screen, a third node, a first current mirror coupled to the second node and the third node configured to generate a current at the third node that is proportional to a second current at the second node, and a detection circuit that provides a signal based on the first current that indicates contact of the touch screen.

Touch screen detection and diagnostics

A programmable temperature sensing circuit includes a comparator, first and second CTAT sensing elements, first and second PTAT reference circuits, and a selection circuit. When a selection signal is a first logic state, an output terminal of the first PTAT reference circuit is coupled to the second CTAT temperature sensing element for providing a first threshold voltage to the second input of the comparator. When the selection signal is a second logic state different from the first logic state, a series-connection of the first PTAT reference circuit and the second PTAT reference circuit are coupled to the second CTAT temperature sensing element for providing a second threshold voltage to the second input of the comparator. The comparator provides an output voltage indication when a voltage provided by the first CTAT sensing element compares favorably with the selected one of the first or second threshold voltages.

Programmable temperature sensing circuit for an integrated circuit

A low voltage detector () includes a voltage and current reference circuit (); a power supply voltage monitor circuit (), coupled to the voltage and current reference circuit and to a power supply; and a voltage comparator (), coupled to the voltage and current reference circuit and to the power supply voltage monitor circuit. The voltage and current reference circuit includes a self-cascode MOSFET structure (SCM) () that produces a reference voltage. The power supply voltage monitoring circuit includes another SCM () that produces a monitor voltage, related to the power supply voltage. The reference voltage and the monitor voltage have a same behavior with changes in temperature, thereby allowing the trip point of the low voltage detector to minimally vary with temperature. The low voltage detector is disposed on an integrated circuit (), and the transistors of the low voltage detector consist of only CMOS transistors.

Apparatus, systems and methods are provided for protecting a processing system from electromagnetic interference. An integrated circuit comprises a sensing arrangement configured to sense an interference signal and an interference detection module coupled to the sensing arrangement. The interference detection module is configured to detect when a power level associated with the interference signal is greater than a threshold value. In one embodiment, the interference detection module generates an interrupt for a processing system when the power level associated with the interference signal is greater than the threshold value.

Systems and methods for detecting interference in an integrated circuit

A bandgap voltage reference unit on an integrated circuit () includes a proportional-to-absolute-temperature (PTAT) current source () coupled to a bandgap voltage reference circuit () that includes a plurality of self-cascode MOSFET structures (-) that are cascaded together to form a PTAT voltage generator (). The bandgap voltage reference circuit also includes a complementary-to-absolute-temperature (CTAT) device (). A PTAT voltage from the PTAT voltage generator is added to a CTAT voltage from the CTAT device to produce an output voltage of the bandgap voltage reference unit, such that the output voltage is the bandgap voltage of the integrated circuit and such that the output voltage does not change with temperature.

Voltage reference circuit

A switched-capacitor amplifier circuit (and) with rail-to-rail capability without requiring a rail-to-rail operational amplifier includes a switched-capacitor amplifier (and) and an input network () coupled to the switched-capacitor amplifier. The switched-capacitor amplifier includes a non-rail-to-rail operational amplifier (and). The input network prevents the non-rail-to-rail operational amplifier from receiving an input differential signal that has a common-mode voltage at or near rails of the non-rail-to-rail operational amplifier. Voltages at input terminals of the operational amplifier remain near analog ground, which is an arbitrary voltage level between the rails, during both phases of switching in the switched-capacitor amplifier. In one embodiment, the switched-capacitor amplifier uses a correlated double sampling technique.

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Austin, TX, United States of America

Alfredo Olmos