Infineon Technologies Ag

Alfred Vater

Dirk Meinhold

Giuseppe Miccoli

Gerald Dallmann

Bhaskaran Jayachandran

Friedrich Steffen

Danny Pak-Chum Shum

Hans-Joerg Timme

Reimund Engl

Wolfram Langheinrich

Norbert Urbansky

John Power

Ulrike Bewersdorff-Sarlette

Norbert Mais

Stephan Henneck

In one embodiment, a method of forming a semiconductor device is disclosed. A high-k dielectric is deposited of over a semiconductor body, and a portion of the high-k dielectric is wet etched an etchant selected from the group consisting of hot phos, piranha, and SC1.

Method of forming a non volatile memory device using wet etching

One or more embodiments relate to a method for forming a semiconductor structure, comprising: providing a workpiece; forming a dielectric barrier layer over the workpiece; forming an opening through the dielectric barrier layer; forming a seed layer over the dielectric barrier layer and within the dielectric barrier layer opening; and electroplating a first fill layer on the seed layer.

Semiconductor structure and method for making same

A wafer includes a plurality of chips, each of the chips being spaced from each other by kerf-line regions including a reduced width.

Wafer and a method of dicing a wafer

In one embodiment, a method of forming a semiconductor device includes forming a metal line over a substrate and depositing an alloying material layer over a top surface of the metal line. The method further includes forming a protective layer by combining the alloying material layer with the metal line.

Protection layers for conductive pads and methods of formation thereof

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Dresden, Germany

Alfred Vater