Xilinx, Inc.

Oracle International Corporation

Sun Microsystems, Inc.

Alfred Huang

Michael Gill

Tom Shui

Jorge Ernesto Carrillo

James L Hwang

Zhenman Fang

L James Hwang

Sudipto Chakraborty

William Y Chen

Samuel A Skalicky

Welson Sun

Chen Pan

Implementing an application within a heterogeneous device can include receiving an application specifying a plurality of hardware accelerators and having a plurality of sections corresponding to different subsystems of the heterogeneous device, wherein the plurality of sections are specified using different programming models. Compiling each section based on the programming model of the section and the subsystem of the heterogeneous device corresponding to the section into an accelerator representation. Linking the accelerator representations based on a platform of the heterogeneous device, generating a hardware implementation of the application for the heterogeneous device based on the linked accelerator implementations, and automatically generating program code configured to control one or more of the plurality of hardware accelerators of the hardware implementation.

Development environment for heterogeneous devices

Using a high-level language (HLL) callable library for multiple instances of a core includes detecting, using computer hardware, a reference to an HLL library for a core within an HLL application, determining, using the computer hardware, a plurality of instances of the core by detecting function calls within the HLL application correlated to each of the plurality of instances of the core, and generating, using the computer hardware, interface code within the HLL application for each of the plurality of instances of the core using the HLL library. An executable version of the HLL application is generated, using the computer hardware, wherein the interface code for each of the plurality of instances of the core is bound to the respective instance of the core. The function calls can specify different parameterization files corresponding to the plurality of instances of the core.

Heterogeneous instantiation of high-level language callable library for hardware core

Creating a high-level language (HLL) callable library for a hardware core can include automatically querying, using computer hardware, a metadata description of a core to determine a plurality of available ports of the core, automatically determining, using the computer hardware, an argument of a first function specified in a header file corresponding to the core, mapping, using the computer hardware, the argument to a first port of the plurality of available ports, and automatically generating and storing, using the computer hardware, an HLL library specifying a mapping of the argument to the first port of the core. The HLL library is configured for inclusion with a user application during compilation.

Automatic creation of high-level language callable library for a hardware core

Utilities for use in generation of a single executable (e.g., single set of machine code) compatible with processors of multiple different architectures and/or versions with reduced levels of code bloating, no or limited changes to the source code, no or limited special code and/or data sections in the executable, and the like. Specifically, a compiler can selectively generate machine code for each of one or more particular C++ functions for each of a plurality of different processor versions and/or architectures in a 'multi-version mode' or 'multi-architecture mode' to allow such functions to perform better under different processor versions or architectures, avoid the need to maintain multiple entire object code sets for different processor versions or architectures, and allow for maintenance of a substantially complete C++ code mechanism.

Selective generation of multiple versions of machine code for source code functions for execution on different processor versions and/or architectures

In a compiler, a method of generating assembly code for stack unwinding is disclosed. One or more source code lines are obtained. Assembly code for the one or more source code lines is then generated. The assembly code includes one or more stack unwind assembler having one or more associated stack unwind sub directives. Each of the stack unwind assembler directives is adapted for indicating to an assembler that one or more encoded data sections containing stack information to be used for stack unwinding is to be generated in an object file from the one or more associated stack unwind sub directives.

Methods and apparatus for use in aiding stack unwinding

Growing community of inventors

Fremont, CA, United States of America

Alfred Huang