Rca Inc.

General Electric Company

Sarnoff Corporation

David Sarnoff Research Center, Inc.

United States of America As Represented by the Secretary of the Air Force

Rca Licensing Corporation

Alfred C Ipri

Roger Green Stewart

Dora Plus

Doris W Flatley

Lubomir L Jastrzebski

Joseph H Scott, Jr

Robin Mark Adrian Dawson

Gary Mark Dolny

John Carl Sarace

Fu-Lung Hseuh

Grzegorz Kaganowicz

Zilan Shen

Michael Gillis Kane

Louis S Napoli

Fu-Lung Hsueh

James Harold Atherton

John W Robinson

Louis Sebastian Napoli

Richard Seely Crandall

Joseph C Sokoloski

Achilles G Kokkas

James Ya-Kong Hsu

Joseph Hurlong Scott

Stephen John Connor

An emissive display device such as an active matrix electroluminescent display (AMEL display) has an improved method of operation. The AMEL display produces gray scale operation comprising an array of pixels, each pixel including a first transistor having its gate connected to a select line, its source connected to a data line, and its drain connected to the gate of a second transistor. The second transistor has its source adapted to receive a ramped voltage level, and its drain connected to a first electrode of an electroluminescent cell. The electroluminescent cell has a second electrode connected to an alternating current high voltage power source, wherein the electroluminescent cell is illuminated, when the ramp voltage level is less than a voltage level on the gate of the second transistor. The ramp voltage level is increased linearly during a frame duration, and the alternating current high voltage power source is on continuously during the same frame duration. The alternating current high voltage power source may also be varied in amplitude from a minimum peak-to-peak value to a maximum peak-to-peak value during the frame duration.

Analog active matrix emissive display

A row-select circuit for an organic light emitting diode display propagates a gating pulse through a shift register. This gating pulse is synchronized with a system clock signal and is used to selectively apply a plurality of broadcast control signals to a selected row of pixels on the display. The line scanning circuitry is controlled to clear and autozero the pixels in the display either one line at a time or the entire image frame at a time. According to another aspect of the invention, the clearing of a row of pixels in the display is performed over several line intervals before the row is autozeroed and loaded with new values. According to yet another aspect of the invention, the broadcast control signals may be adapted to achieve the best performance for each display device.

Line scanning circuit for a dual-mode display

A circuit design technique polysilicon thin-film transistor (TFT) circuitry produces circuits that are relatively less sensitive to threshold variations among the TFT's than circuits designed using conventional techniques. The circuit is designed such that thin-film transistors that are sensitive to threshold variations are made larger than other thin-film transistors in the circuitry to minimize threshold variations among similar transistors implemented in the circuit. In one embodiment, a pixel structure for an active matrix display device implemented in polysilicon includes two transistors, a select transistor and a drive transistor. The drive transistor in the pixel structure is a thin film metal oxide silicon (MOS) transistor that includes a gate to source capacitance sufficient to hold an electrical potential which keeps the transistor in a conducting state for an image field interval. One embodiment of the pixel structure includes only the select transistor and the drive transistor. The pixel storage capacitance is entirely realized by the gate to source capacitance of the drive transistor. Another embodiment of the pixel structure includes a capacitor which is much smaller than the capacitor of a conventional active matrix pixel structure. This capacitor holds the pixel in a non-illuminated state when the drive transistor is turned off. This pixel structure may be used with any display technology that uses an active matrix and stores image data on a capacitance in the pixel, including without limitation, organic light emitting diodes, electroluminescent devices, and inorganic light emitting diodes.

Thin-film transistor circuitry with reduced sensitivity to variance in transistor threshold voltage

A LED pixel structure that reduces current nonuniformities and threshold voltage variations in a &ldquo;drive transistor&rdquo;of the pixel structure is disclosed. The LED pixel structure incorporates a current source for loading data into the pixel via a data line. Alternatively, an auto zero voltage is determined for the drive transistor prior to the loading of data.

Active matrix light emitting diode pixel structure and concomitant method

In an active matrix electroluminescent display, a pixel containing a electroluminescent cell and the switching electronics for the electroluminescent cell where said switching electronics contains two transistors, a low voltage MOS transistor and a high voltage MOS transistor. A low voltage transistor is controlled by signals on a data and a select line. When activated, the low voltage transistor activates the high voltage transistor by charging the gate of the high voltage transistor. The gate charge is stored between the gate electrode of the high voltage transistor and an electric field shield forming a pixel signal capacitor. The pixel signal capacitor is positioned within the layout of the pixel a distance from the drain of the high voltage MOS transistor.

Switching circuitry layout for an active matrix electroluminescent

A pixel structure for use in a display using organic light emitting diodes (O-LEDs) is described. Each pixel structure of an overall array includes an organic light emitting diode (O-LED). Additionally, the structure includes circuitry for allowing the structure to operate in three basic modes: write select mode, write deselect mode and an illuminate mode. Hence, the structure includes circuitry for causing the pixel structure to be selected such that data can be written to the pixel structure, said data representative of a programmed current level to be applied to the O-LED; circuitry for causing the pixel structure to be deselected when a pixel structure in a different row is having data written thereto; and circuitry for applying the programmed current level to the OLED, causing the O-LED to illuminate.

Active matrix organic light emitting diode (amoled) display pixel

In an active matrix electroluminescent display, a pixel containing a grounded conductive electric field shield between an EL cell and the switching electronics for the EL cell. In a method of fabricating the pixel, first, an EL cell switching circuit is formed, then an insulating layer is formed over the switching circuit and a conductive layer (the field shield) is formed over the insulating layer. A through hole is provided in the field shield such that an electrical connection can be made between the switching circuit and an EL cell. The EL cell is then conventionally formed on top of the shield layer. Consequently, the shield isolates the switching circuit from the EL cell and ensures that any electric fields produced in the EL cell do not interfere with the operation of the switching electronics. Furthermore, the switching circuitry for each cell contains two transistors; a low voltage MOS transistor and a high voltage MOS transistor. The low voltage transistor is controlled by signals on a data and a select line. When activated, the low voltage transistor activates the high voltage transistor by charging the gate of the high voltage transistor. This gate charge is stored between the gate electrode of the high voltage transistor and the electric field shield. Additionally, to improve the breakdown voltage of the high voltage transistor, a capacitive divider network is fabricated proximate the drift region of that transistor. As such, the network uniformly distributes an electric field over the drift region.

High-voltage transistor

Active matrix electroluminescent display pixel element having a field

Method for fabricating a switching transistor having a capacitive

A Liquid Crystal Display device has first and second transparent substrates with a liquid crystal material sealed therebetween; a centrally disposed optically active display region having a matrix of pixels and a first and second scanner, and a transparent common electrode formed on the inner surface of the first and second transparent substrates, respectively; and a power supply and data signal distribution region surrounding at least a portion of the optically active display region and near the first and second scanners. The power supply and data signal distribution region comprises (a) a groove, and (b) a plurality of parallel conductors, formed on the inner surface of the second and first transparent substrates, respectively, which conductors include a height extending into the groove to reduce each conductor's resistance. Conductor capacitance is reduced by (a) eliminating the transparent common electrode from the groove, and/or (b) providing an inert dielectric material or gas in the distribution region with a lower dielectric constant than the liquid crystal material.

High speed signal and power supply bussing for liquid crystal displays

A CMOS device is provided with a field shield region below one of the P and N channel MOS transistors, whereby the field shield region is formed to have the opposite conductivity of both the one MOS transistor it underlies, and of the substrate, thereby permitting the field shield region to be biased to a potential for turning off any anomalous back channel leakage current in the one MOS transistor, and also permitting the substrate to be biased to an opposite polarity for turning off such leakage current in the other MOS transistor.

Low leakage silicon-on-insulator CMOS structure and method of making same

A three-mask process for fabricating liquid crystal devices enables the simultaneous fabrication of thin film transistors and conductor crossovers, thereby permitting the simultaneous fabrication of drive circuitry on the periphery of the devices.

Thin film transistor and crossover structure for liquid crystal displays

A memory cell has a first capacitance between a floating gate and a channel region and a second capacitance between a control gate and the floating gate. The second capacitance is less than said first capacitance, preferably much less, and there is self-alignment in two directions, resulting in a compact cell. The floating gate can have a textured surface facing the control gate. The control gate can also shift the cell operation from the enhancement mode into the depletion mode.

Memory cell for a dense EPROM

A compact memory has a plurality of memory cells that are serially coupled. The plurality of cells are capacitively coupled to a substrate and directly coupled to switching circuits at both of its ends, which can disconnect the plurality of cells from a bit line at one end and a ground bus at the other end. An inhibit operation comprises precharging an array of pluralities of cells and the discharging of a selected plurality of cells. A WRITE operation comprises turning ON non-selected cells and then applying a programming voltage to a selected cell.

Dense EPROM having serially coupled floating gate transistors

A multilayer interconnect and method of forming the same between first and second overlying conductive strips separated by an insulating layer having an aperture therethrough. The improvement wherein at least one edge of the first strip is aligned with an overlying edge of the second strip. The interconnect is formed by depositing the second strip on the insulating layer such that it at least partially overlaps the aperture and extends beyond an edge of the first strip. The second strip and first strip are then partially removed such that at least one edge of the first and second conductive strips are aligned.

Growing community of inventors

Princeton, NJ, United States of America

Alfred C Ipri