Stmicroelectronics S.a.

Sgs-thomson Microelectronics S.a.

Stmicroelectronics (rousset) Sas

Stmicroelectronics Gmbh

Université´ D'aix-Marseille

Alexandre Malherbe

Michel Bardouillet

Luc Wuidart

Fabrice Marinet

Pierre Rizzo

Alexandre Tramoni

Alexandre Charles

Benjamin Duval

Jérôme Conraux

Edith Kussener

Vincent Telandro

Alain C Pomet

William Orlando

Claude Anguille

Fabrice Blisson

A method of determining, by a first device capable of transmitting a two-state signal over a single-wire connection to a second device, the binary state of data transmitted by the second device over said connection, the state being determined according to the slope of a rising edge of the two-state signal.

Detection of data received by a master device in a single-wire communication protocol

A method and a system for qualifying an integrated circuit according to a parasitic supply peak detector that it contains, including: supply of the integrated circuit to be tested under at least a first voltage; checking of a starting of the circuit; application of at least one first noise peak on the circuit power supply, while respecting an amplitude and time gauge; and comparison of average currents consumed by the circuit before and after the peak.

Qualifying of a detector of noise peaks in the supply of an integrated circuit

A method of detection of the presence of a contactless communication element by a terminal emitting an electromagnetic field, in which an oscillating circuit of the terminal is excited at a frequency which is made variable between two values surrounding a nominal tuning frequency of the oscillating circuit; a signal representative of the load of the oscillating circuit being interpreted to detect that a reference voltage has not been exceeded, which indicates the presence of an element in the field. A presence-detection circuit and a corresponding terminal.

Detection of the presence of a contactless communication element within the range of a terminal

A random signal generator uses a folded MOS transistor, whose drain-source current includes a random component, as an electronic noise source. The random signal generator generates a random binary signal from the random component. The invention may be applied, in particular, to smart cards.

Random signal generator

An integrated cell and method for extracting a binary value based on a value difference between two resistors values, including connection circuitry for a binary reading of the sign of the difference between the resistors, and connection circuitry for a modification of the value of one of the resistors to make the sign of the difference invariable.

Extraction of a binary code based on physical parameters of an integrated circuit via programming resistors

A circuit for detecting noise peaks on the power supply of an electronic circuit, including at least a first transistor having its control terminal connected to a terminal of application of a first potential of a supply voltage of the circuit and having a first conduction terminal connected to a terminal of application of a second potential via at least one first resistive element, the second conduction terminal of the first transistor providing the result of the detection.

Detector of noise peaks in the power supply of an integrated circuit

An integrated cell for extracting a binary value based on a value difference between two resistors values, including connection circuitry for a binary reading of the sign of the difference between the resistors, and connection circuitry for a modification of the value of one of the resistors to make the sign of the difference invariable.

Extraction and stabilization of a binary code based on physical parameters of an integrated circuit

The invention relates to a method and device for the irreversible reduction of the value of an integrated polycrystalline silicon resistor. The inventive method consists in temporarily subjecting the resistor to a stress current which is greater than a current (Im) for which the value of the resistor is maximum.

Irreversible reduction of the value of a polycrystalline silicon resistor

A method and a circuit for scrambling the current signature of a load comprising at least one integrated circuit executing digital processings, including supplying at least the integrated circuit from a supply voltage external to the circuit by combining a current provided by a first linear regulator with a current provided by at least one capacitive switched-mode power supply circuit with one or several switched capacitances.

Secure supply of an integrated circuit

A method and a circuit for scrambling the current signature of a load including at least one integrated circuit executing digital processings, including the step of, at least on the load ground side, combining a current absorbed by a first linear regulator with a current absorbed by at least one capacitive switched-mode circuit with one or several switched capacitances.

Scrambling of the current signature of an integrated circuit

Extraction of a binary code based on physical parameters of an integrated circuit through programming resistors

A one-time programmable memory cell and the programming thereof including a programming transistor which is disposed in series with a polycrystalline silicon programming resistor forming the memory element. The programming is non-destructive with respect to the polycrystalline silicon resistor.

Memory cell with non-destructive one-time programming

A resistive element controllable to irreversibly decrease its value, including several polysilicon resistors connected in series between two input/output terminals of the resistive lemen; and an assembly of switches, connected to turn the series connection into a parallel association of said resistors between two programming terminals intended to receive a supply voltage.

Resistive polysilicon element controllable to irreversibly decrease its value

A circuit for controlling the random character of a bit flow, including an input shift register receiving the bit flow and having its outputs exploited in parallel, at least one element for comparing at least a partial content of the input register with predetermined patterns, a plurality of counters in a number at most equal to the number of predetermined patterns, and an element for detecting the exceeding of at least one threshold by one of the counters, the result of this detection conditioning the state of a word or bit indicative of the random or non-random character of the bit flow.

Growing community of inventors

Trets, France

Alexandre Malherbe