The Plessey Company Plc

Gpt Limited

General Electric Company

Standard Telephones & Cables Limited

Gec Plessey Telecommunications Limited

The Post Office

Alexander S Philip

Thomas S Maddern

Geoffrey Chopping

Richard John Proctor

Frederick H Rees

Anthony E Shuttleworth

John W Ansell

John S Arnold

Mark T Jeffrey

Michael G Foxton

Mahir Ozdamar

Stephen Niewiadomski

Graham Howard

Allen Parkinson

Robert V Moberly

Gordon William Chambers

Joseph A French

A line communication system for linking a plurality of telephone subscribers to a public telephone exchange, wherein the subscribers are each located within the same general area, and wherein each subscriber is fed from the same mains electricity sub-station with mains electricity is provided. The line communication system provides subscriber apparatus which includes a cordless telephone (CT) handset and a frequency convertor for each subscriber. The handset is hard-wired to the mains electricity supply conductors via the frequency convertor so that CT signals at UHF are down-converted to HF for transmission through the mains electricity conductors. A CT base station is connected to the public telephone exchange. The CT base station is connected to the mains electricity supply conductors via a further frequency convertor for HF line communication purposes. A control matrix is provided in operative association with the base station, which serves to associate an address (corresponding to a telephone number) for each subscriber as recognized by the public telephone exchange with corresponding channels assigned by the CT protocol to each subscriber. Thus, the public telephone exchange and the subscribers are placed in mutual two-way communication and that calls are correctly routed and billed.

Line communication systems incorporating mains electricity conductors

A broadband multiport coherent optic data switch comprises a passive optic combiner/splitter, a plurality of port units and a switch control unit connected thereto, each port unit having a coherent optic source tuned to a respective optic frequency, the output of each source carrying thereon control information, including control information received from the control unit, together with switched data, the outputs of the sources being combined and distributed to all of the plurality of port units.

Optic switching

The invention concerns an Asynchronous Transfer Mode Switch having a plurality of input stages (IS1 . . . 1SN) each for receiving a digital data transmission stream (DS1 . . . 256) consisting of a series of cells and wherein each input stage of the switch includes a circuit (52) for determining the destination of the cells of that data stream, and a circuit (63) for disassembling each cell into cell elements and for allocating to each cell element routing data to enable it to be routed across the central stages.

High performance asynchronous transfer mode switch

The fault detection and bandwidth monitoring arrangement provides a counter in association with each virtual circuit crosspoint. The counters may be provided with a common or individual threshold value which when exceeded causes alarm signals to be generated. The counter arrangement is arranged to record the averaged imbalance of receive and transmit data at each switch port involved in the virtual circuit connection, and additionally is arranged to measure the difference between the net data flows of the corresponding incoming and outgoing ports. Therefore, it is possible to distinguish between the go/return traffic imbalance and an information loss situation in the switch.

Fault detection and bandwidth monitoring means for a packet switching

An asynchronous time division (ATD) switch for carrying out packet switching. In one embodiment a switch has 256 ports running at 155 M bits and is capable of switching incoming data cells at each of the input ports to any one of 256 output ports. At each input port a switch sequentially distributes the received data cells over 16 outputs each of which is connected to a different DMR circuit. There are 256 DMR circuits each having 16 inputs and 16 outputs. A DMR circuit is a fixed space switching device which has N inputs, N time intervals and N outputs and operates cyclically so that each input goes to each output for 1/Nth of the time. The inner stage of the ATD switch comprises 256 central switches each having 16 inputs and 16 outputs. Each central stage switch has its 16 inputs connected to 16 different DMR circuits. The fourth stage of the switch consists of another array of 256 output DMR circuits with each central switch being connected to 16 different output DMR circuits. Each input DMR has its outputs connected to 16 different output ports. The internal circuitry of the ATD switch runs on 20 M bits. When a data cell is received at an input port its destination is derived from a header attached to the cell. Control circuitry enables the receiving port to request three addresses to query three possible routes through the switch. The ability to provide this series of questions is given by staggering the windows through which an output port can communicate with the central switches. Although data streams are received asynchronously the operation of the ATD switch is synchronous.

Asynchronous time division switch with increased traffic handling

The Telecommunications system includes at least two exchanges and a plurality of user equipments. Each equipment includes a store for holding a user variable data word particular to that user. Each exchange is provided with a store for holding all the user variable data words of the users connected to it, and each exchange is also provided with its own random variable data word. When a first user makes a secure call to a second user, the first user equipment encrypts the call using its particular variable data word and sends the encrypted data to its own exchange. The exchange decrypts the call using the particular user variable data word that will be used for the call. The exchange encrypts the random variable data word with the particular user variable data word and returns it to the first user. The exchange also sends the random variable data word to the second user's exchange which encrypts it with the user variable data word particular to the second user, and sends it to the second user.

Method of secured communications in a telecommunications system

The arrangement is for controlling speech communication in a communications exchange. The speech transmission is handled by a switchblock composed of a number of digital switching modules interconnected by a plurality of wire connections, and requiring the speech signals to be accompanied by bit and frame clock references to allow a receiving module to align the incoming data to its clock reference. The wire connections which carry frame synchronization information also carry control data which is bit interleaved with the frame synchronization information. Circuit means is provided which receives the bit interleaved frame synchronization information and control data, and demultiplexes the frame synchronization and control data to provide a retimed control data signal for use at the receiving module.

Arrangement for controlling switched speech or data communication in a

A number of methods are used in the prior art to provide speech sample security in a duplicated switch plane telecommunications switching system and these fall into three categories; (i) use the switching planes in a main/standby mode with errors detected by a check code accompanying the speech sample on the plane in use detected errors cause the standby to be switched-to, (ii) transmit speech across both planes simultaneously and compare and (iii) as per (ii) accompanied by a check code to identify the plane at fault. Categories (i) and (iii) require 'extra' routes to transmit the check code whereas category (ii) can not detect which sample is in error. In serial transmission switch planes there are no 'spare' routes available without creating extra routes for the check code alone. The basic principle of the invention is to pass the speech through one plane only which is known as the 'biased to' plane. A checkcode is passed through the other 'biased from' plane. Identical routes are used by the speech data and the check code through these respective planes. The check code is generated in the Rx DLT and both the checkcode and the speech date are checked in the Tx DLT. The DLT selects the biased-to plane under the control of the switch control system. The checkcode format used comprises a 4 bit speech checkcode and a 4 bit checkcode check allowing faults in the 'biased from' plane to be detected.

Digital switching network for telecommunications exchange

The digital switchblock includes a plurality of processor clusters which communicate via peripheral interface buffers with a number of controllers connected in serial configuration and which further communicate with the switchblock. The switchblock has a number of receive digital switching modules connected to incoming PCM transmission channels and a number of transmit digital switching modules connected to outgoing PCM transmission channels. The receive and transmit digital switching modules are interconnected by way of a plurality of control digital switching modules, to which are connected all controllers. The interconnection between one receive digital switching module and one transmit digital switching module is set up by way of one central digital switching module by use of a plurality of control switch state maps stored in the controllers. The maps depict the current state of all digital switching modules and identify a connection path through the switchblock.

Telecommunications digital switchblock utilizing control switch state

It has been proposed to base advanced Digital Switching networks on a modular array using Digital Switch Modules (DSM). It has been found, for large traffic handling Digital switching systems, that the cross-office delay encountered in multi-stage networks based on 8.times.8 Digital Switching Modules (DSM's) is unacceptably large. To maintain the flexibility provided by the multi-stage concepts a demultiplexing/mixing/remultiplexing stage (DMR) is introduced to replace intermediate DSM ranks. The DMR is used to provide a preset time/space switching function within the total trunking providing the availability of a controlled stage but without the control and delay penalties associated with a fully flexible DSM or the control and link blocking disadvantages associated with a pure space switch. The DMR effectively acts as a pre-programmed or counter driven DSM. By adjusting the degree of DMR function it is possible to provide a very wide range of switch sizes which uses a common organization in the controlled switch stages. The operation of the DMR may be defined in conjuction with a mirror imaging correlation function to provide a constant switch loop delay for duplex connections.

Telecommunications switching network using digital switching modules

The digital switching module (DSM) is arranged as an LSI device providing digital (p.c.m.) switching for 256 channels in a space-time-space format. It is unidirectional in operation and is capable of switching data (digitally encoded speech) from any incoming channel to any outgoing channel. It is arranged to act as a building block in constructing larger digital switching networks. The DSM can be programmed to permit combinations of parallel or serial operation at input and output data interfaces, the mode being selected by the length of the pulse width of the frame start reference signal. The switching configuration of input channels to output channels is held within the DSM and can be amended by messages sent along a serial control interface. Interrogation of the switching state and of the data passing through the switch is provided by messages applied to an output control interface. The DSM can be arranged into square arrays to provide full availability switching for a greater number of channels. Three programming pins are provided which influence the control logic of the DSM to route the control information incoming to a square array to the appropriate control store. The array may be grown fram 8.times.8 to 16.times.16 and to 32.times.32.

Time division multiplex telecommunication digital switching modules

It is an emerging international telecommunications requirement that all 32 channels of the p.c.m. multiplex must be switchable. The switching of channel zero relates to the 'spare bits' not defined for synchronization purposes and these bits may be used as a data-bearer for network administration or control purposes. Digital telecommunication switching network, therefore, must be capable of concentrating channel assemblies of these spare bits into one transmit multiplex which may be connected to a spare bit data processor remote from the switching network or co-located with it. The passing of channel zero into the switch block, however, is dangerous because if this data is passed across the switch block to another digital line termination unit DLT in a time slot other than channel zero, then that receiving DLT will be called upon to transmit data containing two valid sets of sync and non-sync patterns which could confuse the synchronization circuits associated with the digital transmission system connected to that DLT. Such an arrangement is prevented using equipment in the receive and transmit DLT's. In the receive DLT after the incoming synchronization channel has fulfilled its synchronization purpose it is deliberately modified such that when switched to a transmit multiplex it will not be erroneously recognized as a sync channel. The modification does not of course cause loss of information contained in the spare bits or alarm bit. At the transmit DLT a decision is made as to whether the international bit in the sync pattern and the international bit and spare bits in the non-sync pattern should be transmitted to line as data ones or the patterns received.

Channel zero switching arrangements for digital telecommunication

A digital switching arrangement for use in a telecommunications exchange handling channels of digital information in time division multiplex form. The digital switching arrangement being particularly suited for use in stored program processor controller environments. The arrangement comprises a digital switching network and a control equipment. The control equipment includes an input queue and an output queue each arranged to store processor input and output messages respectively. The control arrangement is arranged to asynchronously process each output message to process switching network path connections and to generate in the input queue an input message indicative of the actions performed. Each output message includes switching network identification information indicative only of the identities of the incoming and outgoing exchange highways and channels to be involved in the switching network path to be processed.

Digital switching arrangements for stored program control

A digital switching telecommunications exchange handling pulse code modulated information samples in time division multiplex form on incoming and outgoing junctions. The exchange includes a receive interface for each incoming junction and a transmit interface for each outgoing junction and a pair of identical time division multiplex switching networks providing interconnection paths between any incoming junction channel and any outgoing junction channel. Under non-fault conditions exchange calls use indentical paths in each network and the transmit interfaces include error checking and comparison arrangements for each pair of information samples received under fault conditions the transmit interfaces can be arranged to select the non-faulty sample on a per channel basis or can be biased to select one network exclusively.

Growing community of inventors

Wimborne, United Kingdom

Alexander S Philip