Infineon Technologies Ag

Technische Universitát Dresden

Namlab Ggmbh

Institut Fur Mikrotechnik Mainz Gmbh

Omicron Vakuumphysik Gmbh

Alexander Ruf

Sven Schmidbauer

Andre Wachowiak

Stefan Schmult

Manfred Schneegans

Mark Hoinkis

Alfred Kersch

Norbert Urbansky

Florian Schnabel

Stefan Weber

Oliver Gehring

Marion Nichterwitz

Wilhelm Claussen

Wilfried Noell

Thomas Gärtner

Peter Guthner

Karsten Mayr

An electronic circuit having a semiconductor device is provided that includes a heterostructure, the heterostructure including a first layer of a compound semiconductor to which a second layer of a compound semiconductor adjoins in order to form a channel for a 2-dimensional electron gas (2DEG), wherein the 2-dimensional electron gas is not present. In aspects, an electronic circuit having a semiconductor device is provided that includes a III-V heterostructure, the III-V heterostructure including a first layer including GaN to which a second layer adjoins in order to form a channel for a 2-dimensional electron gas (2DEG), and having a purity such that the 2-dimensional electron gas is not present. It is therefore advantageous for the present electronic circuit to be enclosed such that, in operation, no light of wavelengths of less than 400 nm may reach the III-V heterostructure and free charge carriers may be generated by these wavelengths.

Heterostructure of an electronic circuit having a semiconductor device

According to one embodiment, a method for fabricating a contact is provided. The method can include a step of depositing a Ti layer in order to completely fill a contact hole and on a surrounding surface of an insulation layer. The method can also include a step of partially converting the Ti layer into a TiN layer in such a manner that a TiN layer is provided on the top side in the contact hole. Further, the method can include a step of polishing back the Ti layer and any remaining TiN layer on the surrounding surface of the insulation layer in a single-stage polishing step.

Methods for fabricating a contact for an integrated circuit

A method makes contact with a doping region formed at a substrate surface of a substrate. An insulating layer is applied on the substrate surface and a contact hole is formed in the insulating layer. A metal-containing layer is subsequently deposited on the insulating layer and the surface region of the doping region that is uncovered by the contact hole. In a subsequent thermal process having two steps, first the metal-containing layer is reacted with the silicon of the doping region to form a metal silicide layer and then the rest of the metal-containing layer is converted into a metal-nitride-containing layer in a second thermal step.

Method for making contact with a doping region of a semiconductor component

A method for determining relevant deposition parameters in i-PVD processes, includes, first calculating the reaction rates for desired reagents of the gas plasma and of a metal and/or metal compound to be deposited, then simulating the edge coverage of a predetermined structure with the deposited metal based upon the calculated reaction rates with systematic variation of the relevant deposition parameters, and compiling variant tables therefrom. By comparing an experimental verification of the simulated edge coverage by imaging the edge coverage of the metal layer deposited over the determined structure, e.g., using a TEM cross-section, with the simulated deposition parameters for the edge coverages that have been recorded in the variant table, it is possible to read the deposition parameters that are of relevance to the process from the variant table.

Method for determining the relevant ion and particle flows in i-PVD processes

Method for fabricating a microcontact spring on a substrate

A method for depositing a two-layer diffusion barrier on a semiconductor wafer consisting of a TaN layer and a Ta layer serving as a carrier layer for copper interconnects. The TaN layer is inventively deposited at temperatures above 200&deg; C. in a first step, and the Ta layer is deposited in a second step while cooling the semiconductor wafer to a temperature below 50&deg; C.

Method for depositing a two-layer diffusion barrier

A process for producing metal-containing layers, in particular metal-containing diffusion barriers, contact layers and/or antireflection layers. The process according to the invention has a first step in which a metal layer having a predetermined thickness at an elevated temperature is applied to a semiconductor structure. Next, the metal layer is cooled in a nitrogen-containing atmosphere, resulting in a metal nitride layer being formed.

Process for producing metal-containing layers

A method for producing a metal layer with a given thickness includes the step of measuring an electrical resistance of the metal layer via connections on a starting layer provided under the metal layer. The resistance measurement is performed during or after the deposition of the metal layer. The layer thickness of the deposited metal layer is determined from the resistance measurement. Depending on the thickness of the already deposited metal layer, the deposition process is continued or repeated until a metal layer with a desired thickness is produced.

Method for producing a metal layer with a given thickness

An apparatus for transferring structures to a layer to be patterned. The apparatus has a base element and at least one radiation-conducting structure projecting from the base element. The radiation-conducting structure guides radiation to an exit aperture facing away from the base element and the shape of which structure is matched to that of the structure to be transferred.

Apparatus for transferring structures

A microelectronic structure is formed on a first layer or a substrate. The first layer or substrate is formed with grooves and contact openings. A metal nitride layer of TiN or WN covers the first layer or the substrate at least partially. An alpha-phase tantalum layer is deposited on top of the metal nitride layer. Finally, a metal is deposited to completely fill the grooves and the contact openings.

Method of making a microelectronic structure

An optical near-field probe (1) includes a carrier component (10), which carries a tip (40), and has only one membrane (11, 20), transparent at least in the area of the tip (40), which is mounted on the light emission surface (9) of an optical waveguide (2) that is made of a rigid material such as glass or plastic. The dimensions of the membrane (11, 20), at least in one direction in the membrane plane, are less than or equal to the diameter of the optical waveguide (2). To position the tip (40) over the core (3) of the optical waveguide (2), optical methods can be used or the membrane and optical waveguide can be provided with locating elements.

Growing community of inventors

Dresden, Germany

Alexander Ruf