Infineon Technologies Ag

Alexander Reb

Oliver Genz

Momtchil Stavrev

Mirko Vogt

Maik Stegemann

Stephan Wege

Markus M Kirchhoff

Klaus Goller

Werner Graf

Kristin Schupke

Lars Heineck

Barbara Schmidt

Grit Schwalbe

Stefan Gruss

Percy Heger

Hans-Georg Fröhlich

Matthias Handke

Antje Laessig

Stephan Machill

In a method of contacting terminals, a substrate having a first terminal and a second terminal is provided, a terminal surface of the first terminal being located at a shorter distance from a substrate surface than a surface of the second terminal. A first insulating layer, in which a contact via is formed for exposing the terminal surface of the first terminal, is formed on the substrate surface. The contact via is filled with a conductive material, and a second insulating layer is formed on the first insulating layer and on the contact via filled with the conductive material. Using an etching mask, a first recess for exposing the conductive material filling the contact via, and a second recess are etched through the second and first insulating layers for exposing the second terminal surface. A conductive material for producing first and second contact terminals is introduced into the first and second recesses. This is to achieve that the second terminal is contacted in the production of the second contact terminal.

Method and arrangement for contacting terminals

A method for producing a semiconductor structure including preparing a semiconductor substrate, and generating a lower first, a middle second and an upper third masking layer on a surface of the semiconductor substrate. The method further includes forming at least one first window in the upper third masking layer, structuring the middle second masking layer using the first window for transferring the first window, structuring the lower first masking layer using the first window for transferring the first window, and enlarging the first window to form a second window. The method for further includes restructuring the middle second masking layer using the second window for transferring the second window, structuring the semiconductor substrate, using the structured lower third masking layer, restructuring the lower first masking layer using the second window, and restructuring the semiconductor substrate using the restructured lower third masking layer.

Method for production of a semiconductor structure

Disclosed is a method for fabricating a contract hole plane in a memory module with an arrangement of memory cells each having a selection transistor. The methods can be utilized during the production of dynamic random access memory (DRAM) modules.

Method for fabricating a contact hole plane in a memory module

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Dresden, Germany

Alexander Reb