Wolfspeed, Inc.

Infineon Technologies Ag

Macom Technology Solutions Holdings, Inc.

Cree Gmbh

Alexander Komposch

Scott Thomas Sheppard

Marvin Marbell

Qianli Mu

Basim H Noori

Kwangmo Chris Lim

Soon Ing Chew

Eng Wah Woo

Soon Lee Liew

Brian William Condie

Anwar Mohammed

Kevin Shawne Schneider

Simon Ward

Bill Agar

Michael Lefevre

Xikun Zhang

Michael Real

Kok Meng Kam

Dejiang Chang

Jeremy Fisher

Saurabh Goel

Cynthia Blair

Donald Fowlkes

Cristian Gozzi

Erwin Cohen

Mitch Flowers

Benjamin Pain-Fong Law

Ralf Otremba

Haedong Jang

Peter Singerl

Richard Wilson

Sung Chul Joo

Paul Ganitzer

David Seebacher

Stefan Woehlert

Christian Schuberth

Jason R Fender

Benjamin P Law

Madhu Chidurala

Hannes Eder

Kun Wang

Ulf Andre

Daniel Kraft

Arthur Pun

Herman Hugo

Christian Andrada

Jae Hyung Jeremiah Park

Larry Christopher Wall

Samantha Cheang

Marvin Mabell

Melvin Nava

Matthew Kirke Mellor

Eric Jacob Palsgaard

Douglas John Kroon

Donald I Fowlkes

Erwin Orejola

A semiconductor device package includes an interconnect structure with a first surface having at least one die thereon and a second surface that is opposite the first surface and is configured to be coupled to an external device. A protective structure on the first surface of the interconnect structure exposes a heat dissipating surface facing away from the interconnect structure in one or more directions. Related devices and fabrication methods are also discussed.

Semiconductor device packages with exposed heat dissipating surfaces and methods of fabricating the same

A leadframe blank includes a first package blank, a second package blank and a tie bar between the first package blank and the second package blank. The tie bar includes a recessed cavity therein.

Packaged semiconductor devices with leadframes having tie bar with recessed cavity

In one example, a system includes a semiconductor package having a metal contact. The system includes a metal submount. The metal submount includes a plurality of spring pin connectors embedded in the metal submount, the plurality of spring pin connectors being thermally and electrically connected to one another through the metal submount. The metal contact of the semiconductor package is thermally and electrically coupled to the metal submount through the plurality of spring pin connectors.

Thermal and electrical conductivity between metal contacts utilizing spring pin connectors

A transistor amplifier includes a semiconductor layer structure comprising first and second major surfaces and a plurality of unit cell transistors on the first major surface that are electrically connected in parallel, each unit cell transistor comprising a gate finger coupled to a gate manifold, a drain finger coupled to a drain manifold, and a source finger. The semiconductor layer structure is free of a via to the source fingers on the second major surface.

RF amplifier devices including top side contacts and methods of manufacturing

A package mold according to some embodiments includes a first mold body and a second mold body, a mold cavity in the first mold body, a gate in a first side of the mold cavity for supplying liquid mold compound into the mold cavity, a longitudinal vent for releasing gas from the mold cavity in a second side of the mold cavity opposite the first side of the mold cavity, and a transverse vent for releasing gas from the mold cavity in a third side of the mold cavity that extends between the first and second sides of the mold cavity. Methods of packaging an electronic device using the package mold and resulting packaged devices are also disclosed.

Packaged semiconductor devices, and package molds for forming packaged semiconductor devices

A radio frequency (RF) transistor amplifier includes a package submount. a package frame comprising an electrically insulating member and one or more conductive layers on the package submount and exposing a surface thereof, a transistor die on the surface of the package submount and comprising respective terminals that are electrically connected to the package frame, a protective member covering the transistor die, and one or more electrical components that are attached to the package frame outside the protective member. Related RF power device packages and fabrication methods are also discussed.

Packaged RF power device with PCB routing outside protective member

A multi-die package includes a thermally conductive flange, a first semiconductor die made of a first semiconductor material attached to the thermally conductive flange via a first die attach material, a second semiconductor die attached to the same thermally conductive flange as the first semiconductor die via a second die attach material, and leads attached to the thermally conductive flange or to an insulating member secured to the flange. The leads are configured to provide external electrical access to the first and second semiconductor dies. The second semiconductor die is made of a second semiconductor material different than the first semiconductor material. Additional multi-die package embodiments are described.

Package with different types of semiconductor dies attached to a flange

A semiconductor device package includes a package substrate having a die attach region, a silicon carbide (SiC) substrate having a first surface including a semiconductor device layer thereon and a second surface that is opposite the first surface, and a die attach metal stack. The die attach metal stack includes a sputtered die attach material layer that attaches the second surface of the SiC substrate to the die attach region of the package substrate, where the sputtered die attach material layer comprises a void percent of about 15% or less. The sputtered die attach material layer may be formed using a sputter gas including at least one of krypton (Kr), xenon (Xe), or radon (Rn). The die attach metal stack may further include a metal interlayer that prevent contacts with a first barrier metal layer during a phase transition of the die attach material layer.

Contact and die attach metallization for silicon carbide based devices and related methods of sputtering eutectic alloys

RF transistor amplifiers include an RF transistor amplifier die having a semiconductor layer structure, a coupling element on an upper surface of the semiconductor layer structure, and an interconnect structure on an upper surface of the coupling element so that the RF transistor amplifier die and the interconnect structure are in a stacked arrangement. The coupling element includes a first shielded transmission line structure.

RF amplifiers having shielded transmission line structures

A method of forming a packaged semiconductor device according to some embodiments includes providing a leadframe blank including a first package blank, a second package blank and a tie bar between the first package blank and the second package blank, forming a recessed cavity in the tie bar, and separating the first and second package blanks by sawing through the leadframe blank along the tie bar.

Methods of forming packaged semiconductor devices and leadframes for semiconductor device packages

A transistor package that includes a metal submount; a transistor die mounted on said metal submount; a surface mount IPD component that includes a dielectric substrate; and the dielectric substrate mounted on said metal submount. Additionally, the dielectric substrate includes one of the following: an irregular shape, a non-square shape, and a nonrectangular shape.

Integrated passive device (IPD) components and a package and processes implementing the same

RF transistor amplifiers an RF transistor amplifier die having a semiconductor layer structure, an interconnect structure having first and second opposing sides, wherein the first side of the interconnect structure is adjacent a surface of the RF transistor amplifier die such that the interconnect structure and the RF transistor amplifier die are in a stacked arrangement, and one or more circuit elements on the first and/or second side of the interconnect structure.

Packaging for RF transistor amplifiers

A package includes a circuit that includes at least one active area and at least one secondary device area, a support configured to support the circuit, and a die attach material. The circuit being mounted on the support using the die attach material and the die attach material including at least one channel configured to allow gases generated during curing of the die attach material to be released from the die attach material.

Packaged transistor having die attach materials with channels and process of implementing the same

An RF transistor package includes a metal submount; a transistor die mounted to the metal submount; and a surface mount IPD component mounted to the metal submount. The surface mount IPD component includes a dielectric substrate that includes a top surface and a bottom surface and at least a first pad and a second pad arranged on a top surface of the surface mount IPD component; at least one surface mount device includes a first terminal and a second terminal, the first terminal of the surface mount device mounted to the first pad and the second terminal mounted to the second pad; at least one of the first terminal and the second terminal being configured to be isolated from the metal submount by the dielectric substrate; and at least one wire bond bonded to the at least one of the first pad and the second pad.

A transistor amplifier includes a group III-nitride based amplifier die including a gate terminal, a drain terminal, and a source terminal on a first surface of the amplifier die and an interconnect structure electrically bonded to the gate terminal, drain terminal and source terminal of the amplifier die on the first surface of the amplifier die and electrically bonded to an input path and output path of the transistor amplifier.

RF amplifier devices including interconnect structures and methods of manufacturing

Growing community of inventors

Morgan Hill, CA, United States of America

Alexander Komposch