Sandisk Corporation

Sandisk Technologies Inc.

Alexander K Mak

Long C Pham

Jian Feng Chen

Feng Q Pan

Khandker N Quader

Farookh Moogat

Khanh T Nguyen

Yan Li

Jianmin Huang

Chris Avila

Gautam Ashok Dusija

Grishma Shah

Yi-Chieh Chen

Techniques, related to a flash memory device having a non-volatile memory array (NVM), for recovering from a write interrupt resulting from host-supplied memory voltage fault are disclosed. A memory controller is configured to control a response to an occurrence of the write-interrupt, the response including writing to the NVM, after the memory voltage is verified as being within an acceptable range, one or more of a safe copy of a portion of a first sector of upper-page data and a safe copy of a portion of a second sector of lower-page data, and terminating the write interrupt. Terminating the write-interrupt may include receiving new data from the host while avoiding sending an error message to the host.

Flash memory techniques for recovering from write interrupt resulting from voltage fault

In a non-volatile memory system, when it is discovered that the voltage pump pulse provided by a charge pump for programming the memory cells does not match a reference voltage, the programming time period of the voltage pump pulse is adjusted to a value that remains substantially unchanged until the end of the programming cycle. In this manner, the fluctuation in the effective programming time period of the programming pulses is prevented for the remainder of the programming cycle so that a broadening of the threshold voltage distribution will not occur or will be reduced. This feature allows a short programming time period to be designated for the programming pulses for enhanced performance, while allowing the flexibility of increased program time period when the charge pump is operating under conditions that causes it to be slow and/or weak.

Non-volatile system with program time control

Techniques of overcoming a degradation of the apparent charge levels stored in one row of memory cells as a result of subsequently programming an adjacent row of memory cells. After storing the data of the subsequently programmed row elsewhere, the charge levels of its cells are driven to common level. The charge levels of the first row of cells then have a uniform influence from the charge levels of the second row, and, as a result, the chance of successfully reading the data stored in the first row is significantly increased.

Techniques of recovering data from memory cells affected by field coupling with adjacent memory cells

A multi-level non-volatile memory cell programming/lockout method and system are provided. The programming/lockout method and system advantageously prevent memory cells that charge faster than other memory cells from being over-programmed.

Method and system for programming and inhibiting multi-level, non-volatile memory cells

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Los Altos, CA, United States of America

Alexander K Mak