Nxp B.v.

Alexander Guido Gronthoud

Jose De Jesus Pineda De Gyvez

Amir Zjajo

Cristiano Cenci

Rachid Amine

Test vectors for structural testing of an analog circuit are selected by first selecting an initial set of test input vectors for the analog circuit. A set of faults is selected, comprising faults that each correspond to a respective node in the analog circuit and corresponding fault voltage value for that node. A measure of overlap is computed between probability distributions of test output signal values for the analog circuit in response to the test input vectors in the presence and absence of each of the faults from said set of faults respectively, as a function of estimated statistical spread of component and/or process parameter values in the analog circuit. Test input vectors are selected from the initial set of test input vectors for use in testing on the basis of whether the measure of overlap for at least one if the faults is below a threshold value in response to the selected test input vector under control of the test selection computer.

Analog circuit testing and test pattern generation

A method and apparatus for testing analogue or RF circuitry, wherein the power supply VDD is ramped up (step) and quiescent current measurements are taken at selected values of VDD (step) to generate a current signature (step). When the power supply is ramped up, all transistors in the circuit pass through several regions of operation, e.g. subthreshold (region A), linear (region B), and saturation (region C). The advantage of transition from region to region is that defects can be detected with distinct accuracy in each of the operating regions. Once the current signature has been generated it can be compared with the current signature of a fault-free device (step), to determine (step) if the device is operating correctly, and if not, it is discarded.

Testing radio frequency and analogue circuits

According to an example embodiment, there is a testing device for testing a phase locked loop having a power supply input. The testing device comprises a power supply unit for providing a power supply signal Vhaving a variation profile to the power supply input of the phase locked loop, wherein a width and height of said variation profile are formed in such a way, that the voltage controlled oscillator is prevented from outputting an oscillating output signal. There is a means for disabling a feedback signal to a phase comparator of the phase locked loop such that said phase locked loop is operated in an open loop mode, and a meter for measuring a measurement signal of the phase locked loop, while said power supply signal is provided to the power supply input.

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Eindhoven, Netherlands

Alexander Guido Gronthoud