Ixia

Pmc-Sierra, Inc.

Keysight Technologies Singapore Pte. Ltd.

Alexander David Rekow

Thomas Alexander

David Jennings Wicker

Lester Noel Stott

Jeffrey Dean Marker

Timothy Earl Bennington-Davis

Bradley H Smith

Systems and methods are disclosed herein to provide communication test systems for the testing of packet data communication devices, systems and networks. According to one aspect of the subject matter described herein, a test system containing an integrated traffic, protocol and waveform analyzer is disclosed that includes a traffic generator/analyzer and a protocol engine that triggers a waveform analyzer to analyze the signal waveform of a device under test at a predetermined point. Such a test system may offer improved capabilities such as a more selective and accurate measurement of complex signal waveforms, more automated measurements of waveforms pertaining to wireless communication data streams, and more rapid identification and measurement of waveforms corresponding to errored packets.

Systems and methods for using protocol information to trigger waveform analysis

Systems and methods are disclosed herein to provide communication test systems for the testing of multiple-input multiple-output (MIMO) radio frequency wireless data communication devices, systems and networks, including Multi-User MIMO (MU-MIMO) devices and systems. In accordance with one or more embodiments, a test system containing an integrated MIMO signal analyzer is disclosed that includes a protocol engine operative in conjunction with a waveform generator and waveform analyzer that analyzes the signal waveform of a device under test. Such a test system may offer improved capabilities such as a simpler and more flexible measurement of complex MIMO signal waveforms, more automated measurements of MIMO waveforms including beamforming functions, and more accurate measurement of the efficiency of MIMO related functions such as channel estimation, transmit precoding and beamforming.

Systems and methods for beamforming measurements

A datapath packet transmission controller which includes a central processing unit (CPU), a transmit FIFO buffer operative to receive and temporarily store data packets, and a disposition FIFO buffer coupled to said CPU for holding packet disposition commands received from said CPU. The CPU controls reception and storage of data packets in the transmit FIFO buffer, accesses data in data packets in the transmit FIFO buffer, provides disposition commands which control the disposition of packets after storage in the transmit FIFO buffer.

Firmware controlled transmit datapath for high-speed packet switches

Growing community of inventors

Portland, OR, United States of America

Alexander David Rekow