Qualcomm Incorporated

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Ying Duan

A control circuit outputs a first control signal and a second control signal to a first control input and a second control input, respectively, of a programmable delay circuit. In certain aspects, the control circuit receives a rising edge of a delay control signal. In response to the rising edge of the delay control signal, the control circuit outputs a rising edge of the first control signal and a falling edge of the second control signal after the rising edge of the first control signal. The control circuit also receives a falling edge of the delay control signal. In response to the falling edge of the delay control signal, the control circuit outputs a rising edge of the second control signal and outputs a falling edge of the first control signal after the rising edge of the second control signal.

Control signal generation for a delay line

A method of synchronization using samplers includes receiving a digital control code, converting the digital control code into control signals, inputting each of the control signals to a respective one of the samplers, detecting at least one bit transition in the digital control code, generating a synchronization pulse in response to detecting the at least one bit transition in the digital control code, and inputting the synchronization pulse to clock inputs of the samplers.

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