Proteantecs Ltd.

Alexander Burlak

Eyal Fayneh

Evelyn Landman

Shai Cohen

Inbar Weintrob

Guy Redler

Yahel David

Edi Shmueli

An integrated circuit (IC) comprising: a margin measurement circuit configured to monitor multiple data paths of the IC and to output, at different times, different ranges of remaining margins of the multiple data paths; a workload sensor configured to output a value representing aggregate operational stress experienced by the IC over a period of time ending at each of the different times; and a processor configured to: (i) compute, based on the value output by said workload sensor, an upper bound and a lower bound of change of the remaining margin of the IC, and (ii) compute upper and lower bounds of a current remaining margin of the IC, based on (a) the upper and lower bounds of change, and (b) a remaining margin indicated by a border between two adjacent ranges outputted by the margin measurement circuit.

Integrated circuit degradation estimation and time-of-failure prediction using workload and margin sensing

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Mountain Lakes, NJ, United States of America

Alexander Burlak