Avago Technologies General IP (singapore) Pte. Ltd.

Lsi Corporation

Alexander Borisovich Kholodenko

Ivan Leonidovich Mazurenko

Alexander Alexandrovich Petyushko

Denis Vladimirovich Parkhomenko

Aleksey Alexandrovich Letunovskiy

Pavel Aleksandrovich Aliseychik

Dmitry Nicolaevich Babin

Denis Vasilyevich Parfenov

Yang Han

Anatoli Aleksandrovich Bolotov

Denis Vladimirovich Zaytsev

Pavel Aleksandrovich Aliseitchik

Denis Vasilievich Parfenov

Systems and methods for image processing may perform one or more operations including, but not limited to: receiving raw image data from at least one imaging device; computing at least one image depth distance from the raw image data; computing one or more image validity flags from the raw image data; generating at least one data validity mask from the one or more image validity flags; determining a background imagery estimation from at least one image depth distance; generating at least one foreground mask from the background imagery estimation and the at least one image depth distance; generating at least one region-of-interest mask from the data validity mask and the foreground mask; and generating filtered raw image data from the raw image data and at least one region of interest mask.

Front-end architecture for image processing

An image processing system comprises an image processor configured to construct a designated functional based on a plurality of functions each associated with a corresponding portion of image information relating to at least first and second images, and to generate a target image utilizing the constructed functional. For example, the functions may comprise a set of functions &#x192;(A), &#x192;(A), . . . , &#x192;(A) of pixels from respective input images A, A, Aof the image information, and the functional may be a function F(X) of the set of functions &#x192;,(A) &#x192;(A), &#x192;(A) where X denotes the target image and is generated by minimizing the functional F(X). The input images may be received from one or more image sources and the target image may be provided to one or more image destinations.

Target image generation utilizing a functional based on functions of information from other images

An image processing system comprises an image processor configured to perform an edge detection operation on a first image to obtain a second image, to identify particular edges of the second image that exhibit at least a specified reliability, and to generate a third image comprising the particular edges and excluding other edges of the second image. By way of example only, in a given embodiment the first image may comprise a depth image generated by a depth imager, the second image may comprise an edge image generated by applying the edge detection operation to the depth image, and the third image may comprise a modified edge image having only the particular edges that exhibit at least the specified reliability.

Image processor with edge selection functionality

A method and system for key frame based region of interest (ROI) tracking is disclosed. The method includes storing a key ROI set in a key ROI buffer, the key ROI set including at least one key ROI; designating one of the key ROI in the key ROI set as an active key ROI; receiving a point cloud representing a particular ROI to be processed for tracking; establishing a correspondence between that particular ROI and the active key ROI; determining whether to switch the active key designation to another key ROI in the key ROI set and switching the active key designation accordingly; and determining whether to modify the key ROI set and modifying the key ROI set accordingly.

Three-dimensional region of interest tracking based on key frame matching

An image processor comprises image processing circuitry implementing a plurality of processing layers including at least an evaluation layer and a recognition layer. The evaluation layer comprises a software-implemented portion and a hardware-implemented portion, with the software-implemented portion of the evaluation layer being configured to generate first object data of a first precision level using a software algorithm, and the hardware-implemented portion of the evaluation layer being configured to generate second object data of a second precision level lower than the first precision level using a hardware algorithm. The evaluation layer further comprises a signal combiner configured to combine the first and second object data to generate output object data for delivery to the recognition layer. By way of example only, the evaluation layer may be implemented in the form of an evaluation subsystem of a gesture recognition system of the image processor.

Image processor with evaluation layer implementing software and hardware algorithms of different precision

A method for estimating error probability of LDPC codes includes ordering LDPC codes according to features in each code with known error characteristics. The method includes identifying features in each LDPC code having known error characteristics; adding each code to one or more categories based on the existence of such features; and ranking the LDPC codes according to the level of error risk.

Method for selecting a LDPC candidate code

A computer-aided design method for developing, simulating, and testing a read-channel architecture to be implemented in a VLSI circuit. The method uses a coset operating mode and nonzero-syndrome-based decoding to accelerate the simulation of the read-channel's error-rate characteristics corresponding to different parity-check matrices employed in the read-channel's turbo-decoder, such as a low-density parity-check decoder. The acceleration is achieved through recycling some previously generated log-likelihood-ratio values, which enables the method to sometimes bypass certain time-consuming processing steps therein.

Growing community of inventors

Moscow, Russia

Alexander Borisovich Kholodenko