Infineon Technologies Ag

Infineon Technologies Austria Ag

Alexander Binter

Bernhard Goller

Ingo Muri

Christian Grindling

Hans-Joachim Schulze

Roland Rupp

Francisco Javier Santos Rodriguez

Oliver Blank

Werner Schustereder

Jan Richter

Ravi Keshav Joshi

Juergen Steinbrenner

Marko Swoboda

Andreas Riegler

Iris Moder

Gerald Lackner

Ralf Rieske

Wolfgang Jantscher

Manfred Pippan

Matteo Piccin

Petra Fischer

Martin Huber

Waqas Mumtaz Syed

Guenter Schagerl

Kurt Pekoll

Tobias Hoechbauer

Wolfgang Diewald

Heimo Graf

pa The method of processing a semiconductor wafer includes forming one or more epitaxial layers over its first main surface. It also involves forming one or more porous layers within the semiconductor wafer or within the epitaxial layers. Together, the semiconductor wafer, the epitaxial layer(s), and the porous layer(s) form a substrate. Next, doped regions of a semiconductor device are formed within the epitaxial layer(s). After forming these doped regions, a non-porous part of the semiconductor wafer is separated from the rest of the substrate along the porous layer(s).

Manufacturing and reuse of semiconductor substrates

Provided is a parent substrate that includes a central region and an edge region. The edge region surrounds the central region. A detachment layer is formed in the central region. The detachment layer extends parallel to a main surface of the parent substrate. The detachment layer includes modified substrate material. A groove is formed in the edge region. The groove laterally encloses the central region. The groove runs vertically and/or tilted to the detachment layer.

Parent substrate, wafer composite and methods of manufacturing crystalline substrates and semiconductor devices

Disclosed is a method. The method includes implanting recombination center particles into a semiconductor body via at least one contact hole in an insulation layer formed on top of the semiconductor body, forming a contact electrode electrically connected to the semiconductor body in the at least one contact hole, and annealing the semiconductor body to diffuse the recombination center particles in the semiconductor body. Forming the contact electrode includes forming a barrier layer on sections of the semiconductor body uncovered in the at least one contact hole, wherein the barrier layer is configured to inhibit the recombination center particles from diffusing out of the semiconductor body.

Forming recombination centers in a semiconductor device

According to various embodiments, a workpiece planarization arrangement may include: a chuck including at least one portion configured to support one or more workpieces; and a planarization tool configured to planarize the at least one portion of the chuck and to planarize one or more workpieces on the at least one portion of the chuck; wherein the at least one portion of the chuck includes at least one of particles, pores and/or a polymer.

Method for providing a planarizable workpiece support, a workpiece planarization arrangement, and a chuck

According to various embodiments, a workpiece planarization arrangement may include: a chuck including a support carrier; and a workpiece-support replaceably mounted on the support carrier; and a planarization tool configured to planarize the at least one portion of the workpiece-support and to planarize one or more workpieces on the at least one portion of the workpiece-support.

Method for planarizing one or more workpieces, a workpiece planarization arrangement, a chuck and a replaceable workpiece-support for a chuck

Growing community of inventors

Villach, Austria

Alexander Binter