Analog Devices,inc.

Waveguide Corporation

National Semiconductor Corporation

Tundra Semiconductor Corporation

Texas Instruments Corporation

Alexander Alexeyev

David C Reynolds

Benjamin Vigoda

Jeffrey G Bernstein

William Bradley

Eric G Nestler

Vladimir Zlatkovic

Jeffrey Venuti

David James Fensore

Steven M Waldstein

Michael Trakimas

Maurice Richard

Theophane Weber

Various approaches of adjusting a gain of received signals in integrated circuitry include implementing an open-loop source-degenerated amplifier having a pair of input devices for amplifying the received signals; boosting an effective transconductance of the input devices (e.g., using a pair of super-gfeedback loops); and setting a bias current of devices in the open-loop source-degenerated amplifier (e.g., using a constant-gbias circuit).

Programmable gain amplifier with linear in dB gain control

An approach for accurately setting a duty cycle of PA switching waveforms uses an all-digital PVT sensor circuit. In various embodiments, the all-digital PVT sensor circuit measures a pulse width of a periodic reference signal using digital delay line, and subsequently, implements an off-chip digital calculation to program the digital delay line to delay this periodic reference signal so that, when the delayed periodic reference signal is combined with the original (undelayed) reference via a logical AND operation, the resulting signal conforms to a desired duty cycle. In one implementation, the PA is a class-D PA, which may have a single-ended configuration or a differential configuration having two single-ended structures operating in opposite phases.

Duty-cycle control for power-level adjustment in switch-mode power amplifiers

Systems and methods for reducing variability in the output impedance of an integrated switch-mode power amplifier (PA) split the output impedance between passive resistor, which may be on-chip, and a MOSFET switch of the amplifier. The PA may have a single-ended configuration or a differential configuration having two single-ended structures operating with opposite phases. In one implementation, the size of the MOSFET switch is larger than that of the MOSFET switch implemented in a conventional PA, but the size is still acceptable to operate the PA at a desired frequency. In addition, a calibration approach may be utilized to ensure that the MOSFET switch has a controlled and calibrated ON resistance, thereby providing stable output power levels of the PA and ensuring consistency and repeatability in NMR measurements.

Output impedance calibration of integrated switched-mode power amplifiers

Various approaches of receiving signals in integrated circuitry include implementing two successive stages of signal manipulation and employing an interface having an AC coupling network and buffer circuits for decoupling the output impedance and common-mode level of the first stage of signal manipulation from the input impedance and common-mode level of the second stage of signal manipulation without degrading the performance of either stage.

Reconfigurable analog front-end for integrated receiver and sensor applications

An integrated circuit implements at least part of a phase locked loop (PLL). The integrated circuit includes a sampled analog loop filter for the PLL. The loop filter includes a first input for receiving a signal representative of a phase difference between a reference clock signal and a first clock signal, a first output for providing a frequency control signal for controlling a frequency of an oscillator, a clock input for accepting a loop timing clock signal for controlling timing of operation of the loop filter, and a digital control input for configuring a response of the loop filter according to a plurality of control values. In some examples, the loop filter includes charge storage elements coupled by controllable switches, and control circuitry for transferring charge among the charge storage elements to yield the configured response of the loop filter.

Sampled analog loop filter for phase locked loops

An analog belief propagation system uses current mode implementations of storage elements and circuit implementations of at least some nodes of a factor graph using current representations. The system mitigates or avoids effects of non-linearities and approximations in storage and processing elements of the system, for instance, by using storage cells that reproduce current values and using factor circuits that separate control sections and signal path sections of the circuits.

Current mode analog belief propagation

A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.

Storage devices with soft processing

A processor includes a first memory module for storing a first set of storage values each representing a respective input, and a second memory module for storing a second set of storage values in analog form. An analog module is coupled to the first and the second memory modules. The analog module is configured to, in each operation cycle of at least one iteration, update at least some of the second set of storage values based on the first and the second sets of storage values. An output module is for generating a set of outputs from at least some of the second set of storage values.

Belief propagation processor

A processor implements a network of functional nodes and communication paths between the nodes. The processor includes a plurality of circuit implementations of the functional nodes of the processor; and a plurality of signal paths implementing the communication paths linking the circuit implementations of the nodes. At least some of the signal paths are configured to pass signal values represented according to temporal patterns of signal levels on the signal paths. The processor also includes a plurality of circuit components for conversion between a signal value represented as a signal level (e.g., voltage or current level) and a signal value represented as a temporal pattern.

Mixed signal stochastic belief propagation

A circuit includes a signal processing circuit for accepting an input and for generating a set of outputs. The input is provided in an input range that has a set of representative values, and each output represents a measure of an association of the input with one or more of the representative values. The signal processing circuit includes a group of output sections, each output section being responsive to the input of the signal processing circuit. Each output section includes one or more sigmoid generators. Each sigmoid generator is responsive to an input of the output section to generate an output that represents a sigmoid function of the input of the output section. Each output section also includes a circuitry for combining the outputs of the one or more sigmoid generators to form one of the set of outputs of the signal processing circuit. An input transformation circuit is coupled to the plurality of output sections. The input transformation circuit is configurable to transform the input of the signal processing circuit for controlling a mapping characteristic from the input to the set of outputs.

Signal mapping

An approach to converting an analog value based on a partition of an input range produces probabilities that the input is found within each of the regions based, for example, on a noisy version of the input. In some examples, iterative and/or pipelined application of comparison circuitry is used to accumulate a set of analog representations of the output probabilities. The circuitry can be adapted or configured according to the characteristics of the degradation (e.g., according to the variance of an additive noise) and/or prior information about the distribution of the clean input (e.g., a distribution over a discrete set of exemplar values, uniformly distributed etc.).

Analog signal conversion

A system for calibrating operation of integrated differential signal receiver circuitry mounted on a substrate and coupled via surface conductors to edge mounted interface electrodes in which compensation is provided for variances among the resistances of the surface conductors.

Termination compensation for differential signals on glass

Differential signal transmission circuitry in which multiple differential signal transmission circuits are coupled in a stacked relationship between the power supply electrodes to minimize power dissipation by reusing the signal currents among the channels.

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Gorham, ME, United States of America

Alexander Alexeyev