Freescale Semiconductor,inc.

The University of Texas System

Motorola Corporation

Alexander A Demkov

Zhiyi Jimmy Yu

Ravindranath Droopad

Agham-Bayan S Posadas

Agham Posadas

Bich-Yen Nguyen

Marius K Orlowski

Sinan Goktepeli

Philip J Tobin

Jamal Ramdani

William James Taylor, Jr

Jerald A Hallmark

Yi Wei

Rama I Hegde

Jun J Wang

Kurt W Eisenbeiser

Dina H Triyoso

Yong Liang

Jay A Curless

John L Edwards, Jr

Xiaoming Hu

James Bradley Craigo

Dirk C Jordan

Alexandra Navrotsky

Marc Reynaud

John Elliott Ortmann, Jr

Sergey Ushakov

Some embodiments of the present technology simplify the process of producing SOI wafers significantly compared to traditional methods. Furthermore, various embodiments provide a route for the integration of perovskite transition metal oxide thin films with different properties into SOI wafers. As such films display a wide array of novel electronic, magnetic, and optical phenomena, their integration into technologically-relevant SOI wafers will likely allow for the construction of a wide array of novel devices.

Systems and techniques for forming silicon-on-oxide-on-silicon structures

Various embodiments of the present technology enable growth of a-axis oriented barium titanate (BTO) films by inserting a relaxed strain control layer having a larger lattice constant than the c-axis of BTO and a similar thermal expansion mismatch. As a result, in-plane tensile stress causes BTO to grow with its ferroelectric polarization in-plane. Some embodiments allow for BTO films to immediately be grown on silicon with a-axis orientation, and without the need to create thick layers for relaxation. Using various embodiments of the present technology, the BTO can be grown in-plane with minimal dislocation density that is confined to the interface region.

Systems and methods for integrating a-axis oriented barium titanate thin films on silicon (001) via strain control

A spintronic device and a method for making said spintronic device. The spintronic device includes an epitaxial crystalline ferromagnetic oxide formed directly on the semiconductor material thereby allowing spin-polarized current to be efficiently injected from the ferromagnetic oxide into the semiconductor material. A host crystal lattice includes multiple sets of stacked oxide layers of material A and B of a perovskite structure with a formula of ABO. After an oxide layer of B is grown, magnetic ions are introduced to intermix with the B material, which may replace some of the ions of the B material. The process of growing additional stacked oxide layers of material A and B and introducing further magnetic ions after the deposition of the oxide layer of B continues until enough magnetic ions are sufficiently close to one another that they align in the same direction thereby forming a ferromagnetic oxide on the semiconductor material.

Efficiently injecting spin-polarized current into semiconductors by interfacing crystalline ferromagnetic oxides directly on the semiconductor material

A method for forming a semiconductor structure including providing a semiconductor substrate, forming a metallic buffer layer over the semiconductor substrate, forming an amorphous semiconductor layer over the metallic buffer layer, and recrystallizing the amorphous semiconductor layer to form a crystalline semiconductor layer. A semiconductor structure includes a semiconductor substrate, a buffer layer comprising at least one of silicide and germanide formed over the semiconductor substrate, and a crystalline semiconductor layer formed over the metallic buffer layer.

Semiconductor structure having a metallic buffer layer and method for forming

A semiconductor device () having a gate (or) with a thin conductive layer () is described. As the physical dimensions of semiconductor devices are scaled below the sub-micron regime, very thin gate dielectrics () are used. One problem encountered with very thin gate dielectrics is that the carriers can tunnel through the gate dielectric material, thus increasing the undesirable leakage current in the device. By using a thin layer for conductive layer (), quantum confinement of carriers within conductive layer () can be induced. This quantum confinement removes modes which are propagating in the direction normal to the interfacial planefrom the Fermi level. Thus, the undesirable leakage current in the device () can be reduced. Additional conductive layers (e.g.) may be used to provide more carriers.

Semiconductor device having a gate with a thin conductive layer

Semiconductor structures and processes for fabricating semiconductor structures comprising hafnium oxide layers modified with lanthanum oxide or a lanthanide-series metal oxide are provided. A semiconductor structure in accordance with an embodiment of the invention comprises an amorphous layer of hafnium oxide overlying a substrate. A lanthanum-containing dopant or a lanthanide-series metal-containing dopant is comprised within the amorphous layer of hafnium oxide. The process comprises growing an amorphous layer of hafnium oxide overlying a substrate. The amorphous layer of hafnium oxide is doped with a dopant having the chemical formulation LnO, where Ln is lanthanum, a lanthanide-series metal, or a combination thereof, and X is any number greater than zero. The doping step may be performed during or after growth of the amorphous layer of hafnium oxide.

Semiconductor structures and methods of fabricating semiconductor structures comprising hafnium oxide modified with lanthanum, a lanthanide-series metal, or a combination thereof

A mixture of materials can be used within a layer of an electronic device to improve electrical and physical properties of the layer. In one set of embodiments, the layer can be a dielectric layer, such as a gate dielectric layer or a capacitor dielectric layer. The dielectric layer can include O, and two or more dissimilar metallic elements. In one specific embodiment, two dissimilar elements may have the same single oxidation state and be miscible within each other. In one embodiment, the dielectric layer can include an alloy of (HfO)(ZrO), wherein x is between 0 and 1. Each of Hf and Zr has a single oxidation state of +4. Other combinations are possible. Improved electrical and physical properties can include better control over grain size, distribution of grain sizes, thickness of the layer across a substrate, improved carrier mobility, threshold voltage stability, or any combination thereof.

Electronic device including dielectric layer, and a process for forming the electronic device

A semiconductor device includes a continuous doped substrate with a surface, a sulfur-based dielectric material layer positioned on the surface of the continuous doped substrate, a dielectric material layer positioned on the sulfur-based dielectric material layer, and a gate contact region positioned on the sulfur-based dielectric material layer. The continuous doped substrate includes silicon (Si) and the sulfur-based dielectric material includes a transition metal sulfide such as strontium zirconium sulfur (SrZrS), barium zirconium sulfur (BaZrS), strontium hafnium sulfur (SrHfS), barium hafnium sulfur (BaHfS), or the like. Further, the gate contact region includes a layer of one of strontium titanium sulfur (SrTiS), barium titanium sulfur (BaTiS), or the like positioned adjacent to the dielectric material layer.

Semiconductor device structures which utilize metal sulfides

A method of removing an amorphous oxide from a surface of a monocrystalline substrate is provided. The method includes depositing a passivation material overlying the amorphous oxide. The monocrystalline substrate is then heated so that the amorphous oxide layer decomposes into at least one volatile species that is liberated from the surface.

Method of removing an amorphous oxide from a monocrystalline surface

A semiconductor structure comprises a silicon substrate ( ), one or more layers of single crystal oxides or nitrides ( ), and an interface ( ) between the silicon substrate and the one or more layers of single crystal oxides or nitrides, the interface manufactured with a crystalline material which matches the lattice constant of silicon. The interface comprises an atomic layer of silicon, nitrogen, and a metal in the form MSiN , where M is a metal. In a second embodiment, the interface comprises an atomic layer of silicon, a metal, and a mixture of nitrogen and oxygen in the form MSi&lsqb;N O &rsqb; , where M is a metal and X is 0&lE;X<1.

Semiconductor structure having a crystalline alkaline earth metal silicon nitride/oxide interface with silicon

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Austin, TX, United States of America

Alexander A Demkov