Dreamworks Animation LLC

Intel Corporation

Alex M Wells

Alexander P Powell

Esteban D Papp

Systems and processes are described below relating to evaluating a dependency graph to render three-dimensional (3D) graphics using constraints. Two virtual 3D objects are accessed in a virtual 3D space. A constraint relationship request is received, which identifies the first object as a parent and the second object as a child. The technique verifies whether the graphs of the objects are compatible for being constrained to one another. The first object is evaluated to determine its translation, rotation, and scale. The second object is similarly evaluated based on the translation, rotation, and scale of the first object. An image is rendered depicting at least a portion of the first virtual 3D object and at least a portion of the second virtual 3D object.

Constraint evaluation in directed acyclic graphs

Systems and processes are described below relating to evaluating a dependency graph having one or more temporally dependent variables. The temporally dependent variables may include variables that may be used to evaluate the dependency graph at a frame other than that at which the temporally dependent variable was evaluated. One example process may include tracking the temporal dirty state for each temporally dependent variable using a temporal dependency list. This list may be used to determine which frames, if any, should be reevaluated when a request to evaluate a dependency graph for a particular frame is received. This advantageously reduces the amount of time and computing resources needed to reevaluate a dependency graph.

Temporal dependencies in dependency graphs

Various embodiments are generally directed to storing data of a three-dimensional (3D) array in a tiled manner in which adjacent rows of adjacent planes are interleaved to enable more efficient retrieval in performing 3D stencil calculations. An apparatus to perform a stencil calculation includes a processor component, a storage communicatively coupled to the processor component, and an interleaving component for execution by the processor component to interleave storage of data of cells of adjacent rows of a first plane with data of cells of adjacent rows of an adjacent second plane of a 3D array among contiguous storage locations of the storage. Other embodiments are described and claimed.

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Tigard, OR, United States of America

Alex M Wells