Emc Corporation

Alex J Sanville

Douglas Sullivan

Stephen Edward Strickland

Steven D Sardella

Phillip H Leef

David French

William Buckley

Phillip J Manning

A data storage system having a pair of CPU modules each one of having a port coupled to a host computer/server and a storage medium for transferring data during an IO transfer. Each one of the modules produces different types of reset signals, one of such types being a software reset signal produced during a software upgrade of the module and other types being produced for events other than during a software upgrade, The other types produced by a first one of the modules disables the port of the first one of the modules; whereas, in response the software reset signal produced by the first one of the modules during an IO transfer, a second one of the modules couples the port of the first one of the modules to the second one of the modules to enable the IO transfer to be processed by the second one of the modules.

Data storage systems having seamless software upgrades

A technique controls a network switch having a set of ports. The technique involves configuring the network switch to provide an initial set of communications paths between the ports. The initial set of communications paths defines an initial communications path topology within the network switch. The technique further involves receiving a configuration command which identifies a particular operating mode of the data storage system after configuring the network switch to provide the initial set of communications paths within the network switch. The technique further involves reconfiguring the network switch to provide a new set of communications paths between the ports in response to the configuration command. The new set of communications paths (i) defines a new communications path topology within the network switch, the new communications path topology being different than the initial communications path topology, and (ii) supports the particular operating mode of the data storage system.

Techniques for controlling a network switch of a data storage system

A computerized system includes two storage processors having respective local write caches configured to mirror each other. When a first storage processor becomes unavailable and mirroring of the local write caches is prevented, the computerized system continues to attend to write operations from an external host in a write-back manner by caching write data from the write operations in the local write cache of the second storage processor. In response to a failure of the second storage processor, the computerized system preserves the write data within the local write cache of the second storage processor. Then, upon recovery of the second storage processor from the failure, the computerized system continues to attend to further write operations from the external host in the write-back manner by caching additional write data in the local write cache of the second storage processor while the first storage processor remains unavailable.

Recovering from a storage processor failure using write cache preservation

An I/O interface module of a storage system controller includes a management controller and power regulation and monitoring/control circuitry responsible for management of the I/O expansion module and pluggable I/O interface modules, which each include electrical power regulating circuitry to power circuit components. Temperature regulation components (e.g. fan and temperature sensor) provide a cooling airflow and monitor operating temperature. A controller works with the power regulation and monitor/control circuitry and temperature regulation components to perform first and second management activities concurrently. The first management activity involves managing the environmental operating conditions of the I/O expansion module itself, including (i) monitoring and regulating operating temperature and (ii) monitoring and controlling electrical power regulating circuitry of the power regulation and monitor/control circuitry. The second management activity involves managing environmental operating conditions of the I/O interface module, including (i) monitoring insertion and removal of the I/O interface module and reporting such insertion and removal to a separate controller within the storage system controller, (ii) controlling reset status of the I/O expansion module, and (iii) monitoring and controlling the electrical power regulating circuitry of the I/O interface module.

Storage system assembly with distributed enclosure management

A system having a processor, a printed circuit board, and an adapter board, coupled to the processor through the printed circuit board. The adapter board provides a first signal having a first state when the adapter board is in a proper operating condition and a second state when the adapter board is in an improper condition. The adapter board produces a second signal having the second state for less than a predetermined time when an adapter board requires a reset signal from the processor. The adapter board combines the first signal with the second signal a single signal fed to the processor through the printed circuit board. When the processor detects that the single signal is in the second state for a time less than the predetermined period of time, the process interprets the single signal as indicating the adapter board requires a reset.

Method for communicating plural signals generated at a source to a remote destination through a single wire

A data storage system includes a storage processor that is configured to perform load and store operations on a storage array on behalf of external devices. The data storage system also includes a controller that isolates communication between the external devices when coupled to the storage array via the storage processor. The controller further maintains a set of registers that store information associated with the data storage system and allows the storage processor to access the register via an I2C bus. The system utilizes an error detection procedure to allow detection of errors in the data transmitted between the controller and the storage processor. During operation, a checksum value is transmitted between the controller and the storage processor using the I2C bus during a register write or read procedure. The controller and the storage processor utilize the checksum value in an error detection procedure to detect the data errors resulting in transmission of the data by the I2C bus.

Growing community of inventors

Ayer, MA, United States of America

Alex J Sanville