Ferroelectric Memory Gmbh

Alessandro Palludo

Stefano Sivero

Fabio Tassan Caser

Disclosed herein are devices, methods, and systems for calibrating a sensing capacitance value used by a sensing circuit when reading memory cells of a memory. The calibration circuit includes a calibration cell associated with a predefined programming state of the calibration cell. The calibration circuit also includes a read circuit configured to perform a read operation on the calibration cell that generates a calibration voltage based on the predefined programming state and convert the calibration voltage to a target capacitance value based on the calibration voltage. The read circuit is configured to provide the target capacitance value to the memory as the sensing capacitance for the sensing circuit to use when reading the memory cells of the memory.

Devices, methods, and systems for calibrating a sensing capacitor used in a sensing circuit for reading memory cells

Disclosed herein are devices, methods, and systems for operating a sense amplifier comprising a plurality of transistors connected in a cascode configuration. The plurality of transistors are configured to sense, in a read operation mode, a switching signal from the state-programmable memory element, and to apply, in a write operation mode, a programming voltage level to the state-programmable memory element. The plurality of transistors are configured to receive a supply voltage at, in the read operation mode, a first supply voltage level that is lower than the programming voltage level and at, in the write operation mode, the programming voltage level, and to operate the sense amplifier in the read operation mode and the write operation mode with no more than a maximum operational voltage level across each of the plurality of transistors that is less than the programming voltage level.

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Milan, Italy

Alessandro Palludo