Texas Instruments Corporation

Alessandro Paglieri

Jayashree Saxena

Matthew Craig Bullock

Ramyanshu Datta

Christopher Barr

Methods and apparatus to test and compensate multi-channel digital-to-analog converters (DACs) are described. In some examples, a multi-channel digital-to-analog converter (DAC) and an error detector are implemented in an integrated circuit. The multi-channel DAC includes a first DAC channel configured to generate a first analog representation of a digital input signal, and a second DAC channel configured to generate a second analog representation of the digital input signal. The error detector is configured to compare the first analog representation and the second analog representation to generate a difference signal, and to output a signal indicative of whether the difference signal is greater than a predetermined threshold.

Methods and apparatus to test and compensate multi-channel digital-to-analog converters

Disclosed herein is a massive multi-site (MMS) testing architecture. The MMS architecture includes a MMS interface on each of a plurality of devices under test. The MMS interface includes a test protocol manager that may receive test stimulus and send the test stimulus to cores of the device under test. The test protocol manager may receive test responses from cores of the device under test and generate test comparisons based on comparisons between the test responses and expected responses. The test protocol manager may store the test comparisons on the device under test and communicate the stored test comparisons to automated test equipment (ATE) upon being queried by the ATE. The device under test may send the test comparisons to the ATE over a low-bandwidth communication.

Test protocol manager for massive multi-site test

A test structure is for a circuit () includes a scan configuration module (), including routing circuitry () and control (). The routing circuitry (), under control of control circuitry () can be configured to route scan test signals to various scan core modules () over a selected number of input scan ports SI(N&#x2212;1:0) and output scan ports SO(N&#x2212;1:0). Thus, the number of scan ports used can be varied depending upon the tester being used.

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Richardson, TX, United States of America

Alessandro Paglieri