The Uab Research Foundation (the University of Alabama at Birmingham)

International Business Machines Corporation

Aleksandar Milenkovic

Biswajit Ray

Frank Eliot Levine

Milena Milenkovic

Md Raquibuzzaman

Matchima Buddhanoy

A system for performing sanitization of multi-level cell (MLC) memory has a memory controller configured to read and buffer at least a first page of MLC memory that shares MLCs with at least a second page. The memory controller sanitizes the second page by performing at least one write operation to adjust the charge levels in the MLCs so that each bit of the second page is forced to the same value or to a value that mirrors the value of another bit of the same cell. Thus, for multiple pages sharing the same MLCs, the data of at least one page can be sanitized while the data of at least one other page is retained. Such sanitizing can be achieved without having to perform an erase operation, thereby helping to prevent or reduce memory degradation.

Systems and methods for sanitization of multi-level cell (MLC) memory

A system for improving radiation tolerance of memory senses an amount of radiation exposure and, based on the sensed amount of radiation exposure, determines whether to perform one or more techniques for mitigating the effects of the radiation exposure. As an example, the system may perform a data refresh operation by re-writing data that has been corrupted by radiation, or the system may adjust the reference voltage used to read memory cells. In another example, the system may perform a fault repair operation by re-programming cells that have erroneously transitioned from a program state to an erase state. The system may selectively perform different radiation-mitigation techniques in a tiered approach based on the sensed amount of radiation in order to limit the adverse effects of the more invasive techniques.

Systems and methods for improving radiation tolerance of memory

A memory authentication system initiates various memory operations on a memory chip and then assesses the performance of the memory chip in performing such operations in an attempt to identify a signature in the chip's performance that can be used to identify the chip's source. As an example, a partial erase operation may be performed on programmed memory cells in order to drain some charge from the cells but allowing some charge to remain in the cells. Due to process variations during manufacturing, charge should drain from the cells at different rates such that some of the cells may flip to an erase state while other cells remain in a program state. The pattern of bit flips defines a unique signature that may be used to identify the chip's manufacturing source (e.g., the foundry at which the chip was manufactured).

Systems and methods for identifying counterfeit memory

Systems and methods for improving radiation tolerance of three-dimensional flash memory

An improved method, apparatus, and computer instructions for compressing trace data. An instruction stream is identified, and in response to identifying the instruction stream, the instruction addresses in the instruction stream are replaced with a stream identifier to form compressed trace data. Data addresses may be related to instructions in the instruction stream to generate a data trace component in the compressed trace data.

Growing community of inventors

Madison, AL, United States of America

Aleksandar Milenkovic