Intel Corporation

Alejandro Ramirez

Hong Wang

John Thomas Shen

Edward Thomas Grochowski

Wei Ey Li

Perry H Wang

Gerolf F Hoflehner

Ed Grochowski

Marsha Eng

Dan Lavery

In one embodiment, the invention provides a method for examining information about branch instructions. A method, comprising: examining information about branch instructions that reach a write-back stage of processing within a processor, defining a plurality of streams based on the examining, wherein each stream comprises a sequence of basic blocks in which only a last block in the sequence ends in a branch instruction, the execution of which causes program flow to branch, the remaining basic blocks in the stream each ending in a branch instruction, the execution of which does not cause program flow to branch.

Apparatus to implement mesocode

A method, apparatus, and system that compares a current fetch request having a first start address and length associated with the current fetch request to a second start address of the next fetch request, determines whether the content already loaded in a buffer will be used to at least partially fulfill the next fetch request based upon the comparison, and inhibits access to an instruction cache based upon the comparison.

Cache-line reuse-buffer

Growing community of inventors

Barcelona, Spain

Alejandro Ramirez