U.S. Philips Corporation

Albertus T Van De Goor

Henricus G Maas

Wilhelmus J Josquin

Johannes W Van Der Velden

Peter H Kranen

Date J Noorlag

Wilhelmus C Peters

A semiconductor body (1 ) is provided having a first region (4) of one conductivity type adjacent one major surface (2). An insulating layer (5) is formed on the one major surface and masking means (6,7) are used to form over first and second areas (20 and 21) of the one major surface (2) windows (8,9,10) in the insulating layer (5) through which impurities are introduced to form a relatively highly doped region (11) of the opposite conductivity type adjacent the first area (20) and a relatively lowly doped region (12) of the opposite conductivity type adjacent the second area (21). The surface (5a) of the insulating layer (5) is exposed prior to introducing impurities of the one conductivity type for forming a region (13) within the relatively lowly doped region (12) of the opposite conductivity type and with a dose sufficient to form the region (13) but not sufficient to overdope the relatively highly doped region (11) so avoiding the need to mask the first area (20) during this step. The thickness of the insulating layer (5) is such that a proportion of the impurities of the one conductivity type penetrate the insulating layer (5) to increase the doping of a surface layer(40) of the first region (4) so as to reduce problems such as punch-through effects.

Method of manufacturing a semiconductor device by maskless pn junction

A semiconductor device comprising a first region, which is laterally bounded by a second region comprising a countersunk oxide layer and a highly doped polycrystalline silicon layer, which is disposed thereon and is covered by an oxide layer partly countersunk into it. The side edge of the polysilicon layer adjoins a contact zone, which is obtained by diffusion therefrom and is connected via a current path to a zone of a semiconductor circuit element. The upper side of the polysilicon layer is located at a higher level than that of the first region and the contact zone is connected to the said zone of the semiconductor circuit element via an intermediate region located in the first region below the second oxide layer and having a lower doping than the contact zone.

High efficiency, small geometry semiconductor devices

Growing community of inventors

Eindhoven, Netherlands

Albertus T Van De Goor