St-ericsson Sa

Stmicroelectronics International N.v.

Optis Circuit Technology, LLC

Alberto Minuti

Marco Zamprogno

Germano Nicollini

Francesca Girardi

Pierangelo Confalonieri

Federico Guanziroli

An analog input voltage is converted to a digital code by, generating a first set of confirmed bits based on a first series of comparisons of an output of a digital-to-analog converter with the analog input voltage and generating a second set of confirmed bits based on a second series of comparisons of the output of the digital-to-analog converter with the analog input voltage. The first set of confirmed bits is independent of the second series of comparisons. The bits of the digital output code corresponding to the analog input voltage are generated based on the first set of confirmed bits, the second set of confirmed bits and a constant value representative of a voltage shift introduced in the digital-to-analog converter between the first series of comparisons and the second series of comparisons.

Method for digital error correction for binary successive approximation analog-to-digital converter (ADC)

An apparatus () for protecting a circuit () from an input volume comprises a switchable element () arranged to couple the input voltage (V) to the circuit () in response to a first control signal (DRV) having a first value and to decouple the input voltage (V) from the circuit () in response to the first control signal (DRV) having a second value. A monitor stage () compares a monitored voltage (V) to a threshold (V). A controller () provides the first control signal (DRV) to the switchable element (), the first control signal (DRV) having the first value when the monitored voltage (V) is on one side of the threshold (V) and the second value when the monitored voltage (V) is on the other side of the threshold (V), wherein the first value is independent of the input voltage (V) and the second value is equal to the input voltage (V).

Circuit protection

A new approach is disclosed concerning offset cancellation methods in analog to digital converters and analog to digital converters implementing the same. Such approach allows to efficiently cancel offset drifts in analog to digital converters.

Analog to digital conversion method with offset tracking and correction and analog to digital converter implementing the same

An electronic analog-to-digital conversion device includes an analog-to-digital conversion block having a first input for receiving a voltage signal to be converted based on a reference voltage signal provided to a second input, and an input block connected to the first input of the analog-to-digital conversion block. The input block receives an input signal at a first resistive network connected to a second resistive network, which is then connected to a reference potential. The input block also includes an active network connected between an output of the first resistive network and the first input of the analog-to-digital conversion block. The active network has a first input terminal directly connected to the second input of the analog-to-digital conversion block for receiving the same reference voltage signal so that the input voltage signal received at a second input of the active network is processed based on the reference voltage signal.

Analog-to-digital conversion device

According to a method of Successive Approximation Register (SAR) analog to digital conversion, N+1 SAR cycles are performed to obtain an output digital code having N bits. An analog signal is sampled and obtained. After execution of the first N&#x2212;1 SAR cycles, the NSAR cycle is performed by setting a Ntentative analog signal corresponding to a provisional digital code and comparing the Ntentative analog signal with the sampled analog signal to obtain a Ncomparison result. The (N+1)SAR cycle is performed by setting a (N+1)tentative analog signal based on the Ncomparison result, comparing the (N+1)tentative analog signal with the sampled analog signal to obtain a second comparison result, and correcting the provisional digital code based on the (N+1)comparison result to obtain the output digital code. The Nand (N+1)SAR cycles each comprise a plurality sub-comparisons and yield a set of sub-results.

Method of successive approximation A/D conversion

A single-ended to differential buffer circuit is disclosed, adapted to couple at least an input analog signal to a receiving circuit. The buffer circuit comprises an output section comprising a differential amplifier having a first and a second input, a first and a second output. The buffer circuit further comprises an input section comprising a first and a second switched capacitor, each adapted to sample said input analog signal and having a first side and a second side, the first sides of the first and second switched capacitors being controllably connectable/disconnectable to/from said first and second outputs respectively. In the buffer circuit the second sides of said first and second switched capacitors are controllably connectable/disconnectable to/from said first and second inputs of the differential amplifier respectively. Moreover, in the buffer circuit the second sides of the first and second switched capacitors are controllably connectable/disconnectable to/from said second output and said first output respectively. A method for coupling at least a single-ended input analog signal to a receiving circuit with differential inputs is also disclosed.

Single-ended to differential buffer circuit and method for coupling at least a single-ended input analog signal to a receiving circuit with differential inputs

An electrical circuit for conversion from differential to single-ended includes a differential amplifier stage and first and second buffer circuits. The differential amplifier stage includes a first and a second input; and a first and a different second charging circuit that can be operatively coupled, respectively, with an output of the conversion circuit and with an auxiliary output. Each of the first and second buffer circuits is functionally arranged between one of said outputs and between one of said charging circuits. The buffer circuits being configured so as to substantially equalize relative impedances seen towards said outputs.

Differential to single-ended conversion circuit and comparator using the circuit

An integrated buffer device for a switched capacitance circuit having a buffer with an output for an output voltage dependent upon an input voltage that can be supplied by a source to the buffer device; a capacitive switching component that can be switched between a first and second condition and connected, respectively, to the source and to the buffer to transfer the input voltage onto the output; the capacitive switching component provided with a terminal having an associated stray capacitance; a charging and discharging device configured to pre-charge the stray capacitance at a reference voltage before taking up the second condition and to pre-discharge the stray capacitance before taking up the first condition.

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Piacenza, Italy

Alberto Minuti