Intel Corporation

Alberto J Martinez

Adeel A Aslam

William A Stevens, Jr

Karthi R Vadivelu

Ned M Smith

Vincent J Zimmer

Shay Gueron

David I Poisner

David W Grawrock

Ittai Anati

James A Sutton, Ii

Mahesh S Natu

Ernie F Brickell

Brent D Chartrand

Erik C Cota-Robles

John S Howard

Darren L Abramson

Rajeev K Nalawadi

Purushottam Goel

Victoria C Moore

Clifford D Hall

Barry A O'Mahony

Satheesh Chellappan

Jeffrey L Rabe

Serafin E Garcia

Philip R Lehwalder

Christopher J Spiegel

Kar Leong Wong

Mukesh Kataria

Edward V Gamsaragan

David Hines

Kumar K Chinnaswamy

Hans Schipper

Serge Fabre

Jose Mendes Carvalho

Sylvere Billout

Jackie Wensel

Benoit Renault

Shanthanand R Kutuva

Jacek Peszek

Guillaume Denneulin

Tim Abels

Jr William A Stevens

An exciter device for transmitting vibration to a support is described. The exciter device comprises a housing, wherein a portion of the housing comprises an interior surface and an exterior surface, the interior surface disposed inside the housing and the exterior surface disposed outside the housing. An exciter is disposed on the interior surface. A rubber suspension is integrated into the portion of the housing. A printed circuit board comprising an amplifier forms a top of the exciter device.

Adaptive signal customization

An example apparatus includes: a host controller offload capability detector to determine that a media stream offload capability is available in the peripheral interface host controller; a media stream offload arbiter to send a media stream offload request to a media processor manager based on the media stream offload capability and based on a peripheral device being connected to the peripheral interface host controller; and an endpoint mapper to generate an endpoint table entry corresponding to the peripheral device, the endpoint table entry to assign a first communication interface of the peripheral interface host controller to transfer a media stream corresponding to the peripheral device between the media processor and the peripheral interface host controller without the media stream being routed to an application processor that is in circuit with the peripheral interface host controller and in circuit with the media processor.

Methods and apparatus to offload media streams in host devices

In some embodiments a secure permit request to change a hardware configuration is created. The secure permit request is sent to a remote location, and a permit sent from the remote location in response to the permit request is received. The hardware configuration is changed in response to the received permit. Other embodiments are described and claimed.

Provisioning, upgrading, and/or changing of hardware

In one embodiment, the present invention includes a method for obtaining a pre-boot authentication (PBA) image from a non-volatile storage that is configured with full disk encryption (FDE), and storing the PBA image in a memory. Then a callback protocol can be performed between a loader executing on an engine of a chipset and an integrity checker of a third party that provided the PBA image to confirm integrity of the PBA image, the PBA image is executed if the integrity is confirmed, and otherwise it is deleted. Other embodiments are described and claimed.

Extensible pre-boot authentication

Methods and apparatus for mixing encrypted data with unencrypted data are disclosed. A disclosed system receives data from a first media source, such as DVD-Audio content, and encrypts the data from the first media source using a key stream to form an encrypted data stream. The disclosed system may separate the encrypted data stream into a plurality of encrypted data streams and may combine the plurality of encrypted data streams with an unencrypted data stream associated with a second media source to form a mixed data stream. The mixed data stream is formed without decrypting the plurality of encrypted data streams and is transmitted to hardware or a hardware driver.

Methods and apparatus for mixing encrypted data with unencrypted data

A method and system to allow the secure configuration of the configurable feature(s) of a hardware device in a platform. The configuration of the configurable feature(s) of the hardware device is performed with protection against software attacks. A management module determines that the platform is authorized to configure at least one configurable feature of the hardware device and configures each of the configurable feature(s) based on a received configuration message.

Method and system to facilitate configuration of a hardware device in a platform

Secure storage and retrieval of a unique value associated with a device to/from a memory of a processing system. In at least one embodiment, the device needs to be able to access the unique value across processing system resets, and the device does not have sufficient non-volatile storage to store the unique value itself. Instead, the unique value is stored in the processing system memory in such a way that the stored unique value does not create a unique identifier for the processing system or the device. A pseudo-randomly or randomly generated initialization vector may be used to vary an encrypted data structure used to store the unique value in the memory.

Method of storing unique constant values

Provided are a method, system and program for effecting an operating system mode change from one mode to another. In one embodiment, the operating system in one mode is placed in a sleep state in which volatile memory remains active. In booting an operating system from the sleep state, a flag may be detected indicating an operating system mode transfer request. In response, contents of a selected range of volatile memory allocated to the first operating system mode may be swapped with the contents of a selected range of a reserve portion of volatile memory allocated to the second operating system mode. Booting of an operating system in the second mode may be completed using the swapped contents of the volatile memory. Additional embodiments are described and claimed.

Operating system mode transfer

Embodiments of the present invention provide for enumerating codecs on a link. A controller asserts a synchronization signal, and drives one or more control lines associated with selected codecs to a first state. The enumeration period is defined by a predefined number of clock periods after de-assertion of the synchronization signal. During the enumeration period, the controller drives the control lines of codecs that are supported to a second state. If the control line for a codec is not pulled to the second state during the enumeration period, that codec will act disabled, ignoring all inputs, and will not participate in any link activity, until the next reset, where it will again look for an assertion of its control line.

Method and apparatus for enumerating devices on a link

An approach to selecting either an actual stepping revision ID value or a compatible revision ID value to be readable by a processor through a revision ID register.

Method and apparatus for identifying hardware compatibility and enabling stable software images

A Bus Driver implements an arbitration mechanism to allow both the system management interrupt (SMI) and the Bus Driver to cooperatively use a Bus host controller hardware. This mechanism employs a hardware-based semaphore (status bit) to allow either the SMI or the driver to claim ownership of the Bus host controller for an arbitrary period of time. While either the SMI or the driver may own the status bit, the other party must poll the bit until ownership is achieved. For the SMI, this involves scheduling a periodic SMI interrupt. The driver performs self arbitration of claiming the status bit to provide the periodic SMI interrupt the opportunity to claim the bit. The mechanism allows the SMI access to the Bus host controller in a 'timely' manner, while minimizing impact to driver access to the Bus host controller, which could impact driver Bus transaction throughput.

Method for SMI arbitration timeliness in a cooperative SMI/driver use mechanism

In one embodiment of the present invention, an output device sends a spurious data sample in place of a first data sample to be sent from a queue if the queue is in a state of underflow during which the first data sample is not available to be sent. The buffer is to store data samples for an isochronous data transmission. Circuitry skips the first data sample when the first data sample becomes available in the queue so that synchronization for subsequent data samples sent from the queue is preserved. In another embodiment of the present invention, an input device advances an input buffer pointer to point to a next location in a memory in response to receiving a data sample at a queue during a state of overflow. The input buffer pointer indicates a location in the memory to which a next data sample is to be sent from the queue. The queue stores data samples for an isochronous data transmission. By advancing the input buffer pointer, synchronization for subsequent data samples is preserved.

Real-time processing of a synchronous or isochronous data stream in the presence of gaps in the data stream due to queue underflow or overflow

A wake up circuit for a computer system with a codec controller. The circuit provides a wakeup signal to the computer system when a codec detects an event that requires the system to become active. This signal is provided whether the communications link between the codecs and their controller is active or inactive. When the link is inactive, as indicated by the absence of a bit clock, a data signal on any of the codec input lines triggers the controller to send a power activation signal to the system and to initiate an activation of the codec link. If the link is already active, the general purpose input status change bit is transmitted to the controller, which writes it into a register that is used to trigger a power activation signal to the system. An enable input permits the wakeup signal to be enabled or disabled under program control. The wakeup signal can be used to trigger a system management interrupt or other interrupt suitable for initiating a system resume function.

Wakeup circuit for computer system that enables codec controller to generate system interrupt in response to detection of a wake event by a codec

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El Dorado Hills, CA, United States of America

Alberto J Martinez