Allegro Microsystems, LLC

Other

Alberto Bilotti

Ravi Vig

Glenn A Forrest

Jose L Tallarico

Gerardo A Monreal

Hitoshi Yabusaki

Pablo Javier Bolsinger

Teri L Tu

Roger C Peppiette

A switch which is magnetic pole insensitive is described. The switch includes a Hall effect sensor coupled to a threshold circuit which provides an output signal indicative of the proximity of a magnet, and hence a magnetic field, to the Hall effect sensor regardless of the orientation of the magnet to the Hall effect sensor.

Magnetic pole insensitive switch circuit

A high pass filter comprising a combination of capacitors and insulated gate field effect transistors (IGFETs) used as effective resistors provides a low break frequency, while providing improved linearity and a stable break frequency over a relatively wide range of input voltages. The high pass filter can be realized with a small physical size. In one particular embodiment, the small physical size allows the capacitors and the IGFET devices to be integrated together onto a common substrate.

High pass filter using insulated gate field effect transistors

A sensor includes a Hall cell and a compensation circuit for subtracting a magnet background field from the Hall cell output to provide a signal corresponding to rotations of a toothed ferrous gear.

Magnetic gear tooth sensor with Hall cell detector

A two-terminal integrated circuit magnetic-field detector, for use in detecting a low level of a liquid in a vehicle, has a Hall element, a Schmitt type comparator, an anti-sloshing accumulator such as an up-down counter, and a latching driver all connected in tandem. The anti-sloshing accumulator is for producing a signal that is the integral as a function of time of the binary comparator output signal. During sloshing, when the average liquid level is near that at which a low-level warning signal is desired, the accumulator signal climbs in a vacillating manner. The latching driver is connected across the two integrated circuit (I.C.) terminals and latches on when the accumulator signal reaches a predetermined value, dropping the impedance across the two I.C terminals. A liquid level indicating lamp is connected in series with a source of DC voltage and the two I.C. terminals, so that when the average position of the floating magnet approaches that of the I.C. detector, the driver latches on and the low-level indicating lamp is also turned on and cannot be turned off except by removing the DC energizing voltage. The accumulator may be an up-down counter with means for preventing counting in the over-flow mode, and also for preventing counting in an under-flow mode, namely downward counting below zero count.

Two terminal I.C. magnetic-field detector for use in a liquid level

A chopped Hall sensor includes a Hall-element switching circuit of the kind in which a Hall element has two pairs of diagonally opposite Hall contacts which are alternately connected to a pair of DC supply conductors and to a pair of Hall-stitching-circuit output conductors for alternately, during phase .phi.1 and n.phi.1 of a first clock signal, switching the Hall exciting current from flow in one to another direction through the Hall element. A linear analog double-differential Hall-voltage amplifier has an input connected to the output of the Hall switching-circuit. A sample-and-hold circuit is comprised of first and second elemental sample-and-hold circuits (ESHCs) with inputs connected respectively to the two Hall-voltage differential-amplifier outputs. The first and second ESHCs are respectively clocked, by second and third clock signals, to the sample Hall voltage signal only during phases .phi.2 and .phi.3 and to hold the sample signal during phases n.phi.2 and n.phi.3 respectively, where .phi.2 and .phi.3 occur respectively during a mid portion of phases .phi.1 and n.phi.1. Two inputs of a summer circuit are connected respectively to the outputs of the first and second ESHCs. A third and fourth ESHC may be added to form a crossed-polarity full-differential sample-and-hold circuit. The Hall voltage amplifier may include a clocked noise blanking circuit for reducing the differential-gain of the amplifier only during a time span encompassing each phase transition in the first clock signal.

Chopped hall sensor with synchronously chopped sample-and-hold circuit

A full-bridge driver, and especially an entirely integrated bridge driver, for driving DC motors in either direction is capable of automatically braking the motor when the motor direction is to be reversed. The bridge circuit is of 'H' configuration and has four transistor switches connected in bridge configuration and has two bridge output terminals to which a motor may be connected. A differential window comparator has the input connected to the two bridge output terminals, producing a high level binary signal only when the voltage across the two output terminals is within a small voltage range centered at about zero volts. A pulse-width filter circuit having an input connected to the window comparator produces a high binary output signal only when the comparator-produced binary signal remains high for greater than a predetermined time. The effect of the pulse-width filter in combination with the window comparator is to ignore the first occurrence during braking of zero motor voltage, and to recognize the second occurrence of zero motor voltage which indicates the end of the braking period at which time the motor has stopped, after which the motor can be operated in the reverse direction without creating large transient transistor and motor currents during such a transition of motor running direction.

DC-motor bridge driver with end-of-braking detector

A bridge circuit, intended for use as a PWM driver of an inductive load, includes at least one source driver transistor connected in series totem-pole fashion with a sink driver transistor. A base resistor is connected from base to emitter of one of the driver transistors. This totem pole circuit is connected across a pair of DC supply conductors. A protective fly-back diode is connected across the one driver transistor. An auxiliary resistor is connected from the base of the auxiliary transistor to the emitter of the one driver transistor. When a fly-back diode across the one driver transistor conducts, the one driver transistor tends to conduct in the reverse direction and to store charge that in a subsequent period leads to shoot-through currents through the source and sink drivers. The auxiliary transistor turns on only when the fly-back diode conducts and shunts the base-collector of the source transistor, preventing its turning on and storing charge, and thus preventing potentially damaging shoot-through current through the driver transistors. The added auxiliary components do not cause additional power being drawn from the supply source, and therefore do not cause additional heating in the integrated circuit in which the bridge circuit may be formed. A pair of such half wave totem pole circuits may be paralleled to form a full wave bridge.

Bridge circuit for driving an inductive load with a shoot-through

A full-wave bridge driver has four driver transistors. A motor is connected to the output terminals of the bridge. A fault detector latches off the four driver transistors when the bridge current jumps essentially instantaneously to exceed a predetermined safe-peak value due to a fault occurring in the bridge. A comparator has a predetermined current threshold, that is less than the predetermined safe-peak value of the fault detector, and is connected to a bridge-current sensing resistor for, when the bridge current exceeds the current threshold, producing a signal proportional to the difference between the bridge current and the current threshold. A pulse-width-modulator is connected to the comparator means output, and during periods such as at motor starting when the bridge current gradually exceeds the comparator threshold value, chops the signal at the bases of the four driver transistors, varying the chopped pulse widths to hold the motor current at essentially the threshold current value. For faults that occur across the motor or between the motor and either of the DC-supply terminals, the fault current paths in the bridge do not flow through the inductance of the motor and produce a sharp rising bridge fault current that is essentially transparent to the pulse width modulator which clamps high motor start currents at a level below that at which the fault detector trips the latch and shuts off the driver transistors.

Bridge motor driver with short-circuit protection and motor-current

The Hall sensor circuit includes a Hall element that is preferably followed by a Hall-voltage amplifier, and a pole end of a magnet is preferably fixed adjacent to the Hall element. The amplifier output is connected directly to one of a pair of differential inputs of a Schmitt trigger circuit and is also connected, via a single or a dual-polarity track and hold circuit, to the other of the differential Schmitt inputs. The dual-polarity track and hold circuit causes the voltage across a capacitor to track positive and negative Hall voltage slopes, and to hold the positive-going peaks and negative-going peaks of the Hall voltage presented to the fore-mentioned other Schmitt input so that when the difference voltage between the Hall voltage and the held voltage of the capacitor exceeds a positive or negative threshold of the Schmitt circuit, the Schmitt circuit output changes binary state indicating the approaching edge or the receding edge of a ferrous-gear tooth. The dual-polarity track and hold circuit is made up of two complementary plus and a minus peak detector circuits, each including a bipolar transistor having an emitter connected to the voltage-holding capacitor, an operational amplifier with an output connected to the base of the transistor, the amplifier having a negative input connected to the transistor emitter and a positive input serving as the input of the each Hall voltage tracking and holding circuit.

Hall-voltage slope-activated sensor

A bipolar chopping driver circuit has a pair of NPN totem-pole connected driver transistors with a fly-back diode connected across the NPN source transistor and a biasing resistor connected between base and emitter of the source transistor. A fullwave bridge driver may be comprised of two such totem pole circuits with the inductive load connected between them at the junctions between NPN source and sink transistors. A clamp circuit is provided in both cases, for preventing the voltage swings at the bases of the source transistors from exceeding the DC supply voltage that is connected to the collectors of the source transistors, thereby permitting operation at high chopping frequencies without excessive delay in switching load current and excessive power losses.

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Florida, Argentina

Alberto Bilotti