Leviton Manufacturing Company, Inc.

Albert Zaretsky

Roger M Bradley

Benjamin B Neiger

Saul Rosenbaum

Lester Rivera

James N Pearse

William J Rose

Methods and techniques are disclosed for an intelligent GFCI device (IGFCI) having a microcontroller programmed to perform self-testing on a periodic basis and communicate the results of this testing to a remote monitoring device such as a remote central logging computer. In some implementations, with two-way (bidirectional) communication, a plurality of self-testing IGFCI devices can be tested and reset systematically from a remotely located device to reduce disruption to users. The IGFCI device can be configured to be automatically reset or manually reset upon the application of AC power to the device.

GFCI with self-test and remote annunciation capabilities

An arc fault detector, as a stand alone device or in combination with a circuit interrupting device such as a ground fault circuit interrupter (GFCI), protects from potentially dangerous arc fault conditions. The device utilizes line side and load side pickup coils to distinguish between arc faults occurring on the line or load side. An arc fault circuit interrupter (AFCI) circuitry portion of the device shares components from the GFCI circuitry portion, and utilizes the electromechanical power carrying portion of the GFCI, including AC line disconnect circuitry and a power supply. The AFCI employs quantitative detection using variable gain control in combination with either a load disconnect or audible/visual alarm indication. The device also includes a timer circuit, which permits the user to temporarily inhibit or disable the arc detection, and selective frequency filtering permitting arc detection in the presence of power line carrier communications.

Arc fault detector with circuit interrupter

A method for determining the extent of a transient's ability to cause MOV over heating and subsequent explosion by microprocessor analysis of an AC voltage input waveform with respect to a stored perfect sine wave. The microprocessor also calculates the RMS value of the applied voltage waveform and compares it to stored limits to determine if it could cause over heating of the MOV. In either case, the microprocessor will generate an out-of-range signal to a disconnect device to take the MOV, and also the load, if desired, off line until normal line voltage is restored.

Microprocessor detection of transient voltage and abnormal line voltage

A system for controlling the response of a ground fault circuit interrupter in the presence of random leakage currents due to the presence of a conductive media such as water or ice. The signal from a magnetic core differential transformer is applied to two filters in parallel. The first filter passes the fundamental frequency of the source and the second filter passes a broad band of frequencies starting at twice the fundamental frequency. The output of the filters are applied to a microprocessor which manipulates the filter outputs and compares certain of the filter outputs to a stored pattern of expected current leakage. The microprocessor operates a relay to disconnect the load from the source when a fault condition exists.

GFCI ground fault current filtering

An intelligent ground fault circuit interrupter device that incorporates a test and miswiring control circuit in addition to an independent GFCI circuit. Since the test and miswiring circuit is separate and independent of the GFCI circuit portion, it can be used with any circuit interrupting means that can be reset and which incorporates a test circuit. The test and miswiring circuit functions to indicate to a user when the device must be manually tested. The test time events occur upon first installation and on a monthly basis thereafter. The device also indicates that testing is required after occasions of power outage of sufficient time duration and after the device has been tripped by the occurrence of a ground fault. At the times when manual testing of the device is required, a visual and/or audible alarm is triggered and continues until a successful test and reset sequence is completed. The ability to detect when the device is incorrectly wired in an electrical wiring system is also provided. Upon detection of a miswiring condition, a visual and/or audible alarm is triggered to alert the user to the miswired condition. The alarm cannot be disabled unless the miswiring condition is removed.

Intelligent ground fault circuit interrupter employing miswiring

An arc fault detector embodied as both a stand alone device and in combination with a circuit interrupting device such as a ground fault circuit interrupter (GFCI) functions to provide protection from potentially dangerous arc fault conditions. The device utilizes line side and load side pickup coils to permit distinguishing between arc faults occurring on the line side and the load side of the device. The arc fault circuit interrupter (AFCI) circuitry portion of the device shares components from the GFCI circuitry portion as an integral part of its functionality. The AFCI utilizes the electromechanical power carrying, portion of the GFCI, including the AC line disconnect circuitry, the power supply and the physical housing. In addition, the AFCI employs quantitative detection using variable gain control in combination with either a load disconnect or audible/visual alarm indication. The device also includes a timer circuit, which permits the user to temporarily inhibit or disable the arc detection, and selective frequency filtering permitting arc detection in the presence of power line carrier communications. In addition, the device includes communication means to permit the device to communicate the occurrence and location of an arc fault to a centralized monitoring station.

A surge suppressor disconnect protection circuit is coupled to a first surge suppressor. The first surge suppressor is electrically coupled to phase and neutral line terminals of an AC source to protect the first surge suppressor from predetermined overvoltages. The circuit includes a relay switch with a relay contact and a relay drive coil. The relay contact is setable to one of a high and a low impedance state. The relay contact is electrically connected to the first surge suppressor and to one of the line terminals. A signal adjuster is electrically connected at its phase port to the AC phase terminal and to the AC neutral terminal for rectifying AC to generate a DC signal. The adjuster filters the DC signal and scales the filtered DC signal. An amplifier is electrically coupled to the adjuster at a non-inverting input port and to a first voltage reference at an inverting input port. The amplifier output port is electrically coupled back to the inverting input port to provide a feedback path therebetween. An integrator displaying a predefined integrator time constant is electrically connected at its input port to the amplifier means such that a signal is generated at the integrator output port which is proportional to a length of time the scaled DC signal is greater than said first voltage reference. A non-inverting input of a comparator is electrically connected to the integrator output port, and an inverting port of the comparator is electrically connected to a second voltage reference. The comparator output is electrically coupled to the first end of the relay coil such that a current is provided to the relay coil which drives the contact to a high impedance state when the integrator output signal exceeds the second voltage reference.

Automatic surge suppressor disconnect protection system

A method and apparatus for suppressing surges in an electrical power distribution system utilizing stripline techniques. The apparatus includes an input terminal which connects a phase electrical power source to a TVSS device. A stripline circuit connects the input terminal to the TVSS device to greatly reduce the inductance of the connection. Consequently, the clamping voltage rating of the TVSS device is substantially maintained at the input terminal during the occurrence of a power surge.

Apparatus for and method of suppressing power surges utilizing

A two wire detection device includes a relay switch setable to a high and a low impedance state and electrically coupled between a first terminal of an AC source and a first leg of a load, a second leg of which is connected to a second terminal of the AC source. The device includes an energy storage device electrically coupled to the first terminal of the AC source and electrically connected to the first leg of the load. Charge control means interposed between the first terminal of the AC source and the energy storage device regulate the voltage across the energy storage device. A detection control device is electrically connected across the energy storage device and to the switching device for detecting the presence of a condition for monitoring and setting the state of the switching device based thereon such that power is available to the detection control device regardless of the state of the switch.

Two wire PIR occupancy sensor utilizing a rechargeable energy storage

A surge suppressor disconnect protection circuit is coupled to a first surge suppressor electrically coupled to the terminals of an AC source to protect the first surge suppressor from predetermined overvoltages. The circuit includes a relay switch connected in series with the first surge connected to the AC source terminals for rectifying the AC to generate a DC signal. The adjuster filters the DC signal and scales the filtered DC signal. An amplifier is electrically coupled to the adjuster and to and providing a difference signal integrator time constant is electrically connected to the amplifier and produces a signal which is proportional to a length of time the scaled DC signal is greater than the first voltage reference. A comparator is connected to a second voltage reference. The comparator output is electrically coupled to the relay switch which opens the switch contact to set it to a high impedance state when the integrator output signal exceeds the second voltage reference.

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Boynton Beach, FL, United States of America

Albert Zaretsky