Qualcomm Incorporated

Toyota Motor North America, Inc.

Qualcom Incorporate

Albert Scott Ludwin

William Robert Gardner

Ranganathan Krishnan

Yuriy Reznik

Harinath Garudadri

Stephen Paul McFarland, Jr

Naveen Srinivasamurthy

Satyajit P Patne

Hyukjune Chung

Phoom Sagetong

Richard Higgins

Sanjay K Jha

Gwain Bayley

Nicholas K Yu

Raghu Sankuratri

Gregory Bullard

Diane Winchell

Mehraban Iraninejad

Scott Howard King

Safi Khan

Jason C Thomas

Christopher Pruetting

Raymond Stits

Desiree D Brake

Naveen B Srinivasamurthy

Chauhung Lee

Guanming Shi

An example operation includes one or more of determining, by a transport, a potential impact with an object at a location in a lane on a road and, when a distance away from the location exists within the lane, maneuvering, by the transport, the distance within the lane to avoid the potential impact.

Transport-related object avoidance

An example operation includes one or more of determining, by a first node, a location of an aberration on a second node, determining, by the first node, a third node able to document the aberration for a minimum period of time, notifying, by the first node, the third node to document the aberration for the minimum period of time in a first mode, and receiving, by the first node, the documentation in the first mode.

Detection of aberration on transport

Techniques for efficiently performing full and scaled transforms on data received via full and scaled interfaces, respectively, are described and comprise (1) performing a first transform on a block of first input values to obtain a block of first output values by scaling the block to obtain scaled input values, performing a scaled one-dimensional (1D) transform on each row of the block, and performing a scaled 1D transform on each column of the block; and (2) performing a second transform on a block of second input values to obtain a block of second output values by performing a scaled 1D transform on each row of the block, performing a scaled 1D transform on each column of the block, and scaling the block.

Transform design with scaled and non-scaled interfaces

Techniques for efficiently performing full and scaled transforms on data received via full and scaled interfaces, respectively, are described. A full transform is a transform that implements the complete mathematical description of the transform. A full transform operates on or provides full transform coefficients. A scaled transform is a transform that operates on or provides scaled transform coefficients, which are scaled versions of the full transform coefficients. The scaled transform may have lower computational complexity whereas the full transform may be simpler to use by applications. The full and scaled transforms may be for a 2D IDCT, which may be implemented in a separable manner with 1D IDCTs. The full and scaled transforms may also be for a 2D DCT, which may be implemented in a separable manner with 1D DCTs. The 1D IDCTs and 1D DCTs may be implemented in a computationally efficient manner.

Systems and method for providing sensors in batteries are provided. In certain aspects of the disclosure, a battery comprises a housing dimensioned to fit within a battery compartment of the communication device, a battery cell configured to supply power to the communication device, one or more sensors within the housing configured to measure a condition external to the battery and to received power from the battery cell, and an interface configured to interface the one or more sensors with a processing system in the communication device.

Sensor in battery

A mobile computing device with multiple modes, for example, wireless communication and personal computing, has an application processor and a communication processor. In the computing mode, the application processor is the master processor. In the communication mode, the application processor is deenergized to conserve battery power, with the communication processor functioning as the master processor by accessing the device's peripheral bus using the memory interface of the communication processor.

Low power dual processor architecture for multi mode devices

A display processor includes an interface unit, an instruction processor, a synchronization unit, at least one processing unit, and a device buffer. The interface unit receives input image data (e.g., from a main memory) and provides output image data for a frame buffer. The instruction processor receives instructions (e.g., in a script or list) and directs the operation of the processing unit(s). The synchronization unit determines the location of a read pointer for the frame buffer and controls the writing of output image data to the frame buffer to avoid causing visual artifacts on an LCD screen. The processing unit(s) may perform various post-processing functions such as region flip, region rotation, color conversion between two video formats (e.g., from YCrCb to RGB), up/down image size rescaling, alpha-blending, transparency, text overlay, and so on.

Display processor for a wireless device

The dual microprocessor system includes one microprocessor configured to perform wireless telephony functions and another configured to perform personal digital assistant (PDA) functions and other non-telephony functions. A memory system and a digital signal processor (DSP) are shared by the microprocessors. By providing a shared memory system, data required by both data microprocessors is conveniently available to both of the microprocessors and their peripheral components thereby eliminating the need to provide separate memory subsystems and further eliminating the need to transfer data back and forth between the separate memory subsystems. By providing a shared DSP, separate DSP devices need not be provided, yet both microprocessors can take advantage of the processing power of the DSP. In a specific example described herein, the microprocessors selectively program the DSP to perform, for example, vocoder functions, voice recognition functions, handwriting recognition functions, and the like.

Mobile communication device having dual micro processor architecture with shared digital signal processor and shared memory

The virtual device architecture provides physical and logical device drivers for interfacing software programs executing on a microprocessor of the mobile telephone of a wireless communication system with any of a wide variety of hardware devices connectable within the mobile telephone. The logical device drivers convert commands received from the software applications to commands appropriate for use by selected hardware devices. The physical device drivers receive the converted commands from the logical device drivers and in response to the received commands directly control the selected hardware devices. In one example described herein, the logical device drivers provide translation of core commands necessary to control the selected hardware devices and extended commands for enhanced control of the hardware devices. The logical device drivers operate to convert the extended commands into core commands prior to forwarding the commands to the physical device drivers. By providing logical and physical drivers for use with peripheral devices, the need to provide different versions of software executing on the microprocessor to accommodate different types of peripheral devices is substantially eliminated resulting in a considerable reduction in time and cost associated with developing, maintaining and upgrading software. By providing logical device drivers capable of accommodating both core commands and extended commands, a rich set of peripheral commands can be accommodated thereby further reducing or eliminating the need to provide different versions of software executing on the processor, while nevertheless exploiting the full capabilities of a wide variety of peripheral devices, including state of the art hardware devices such as bit-mapped displays, pointer devices and the like. Method and apparatus embodiments are described.

Virtual device architecture for mobile telephones

Growing community of inventors

San Diego, CA, United States of America

Albert Scott Ludwin