USA As Represented by Secretary of the Navy

Albert J Corda

Blaise L Corbett

Walter D Sessions

Yehoshua Dan Agassi

Jack L Price

R Neal Cain

Michael J Kuchinski

A flux compression generator (FCG) is provided for producing an electromagnetic pulse (EMP). The FCG includes an environmental case, a reactive load, a dielectric core, a superconducting stator, an electric energy source, a load switch, and a transition device. The reactive load transmits the EMP in response to an electric current pulse. The dielectric core has proximal and distal ends within the case, with the stator disposed coaxially around the core that provides structural support. The case contains the electrical energy source, the stator, the core and the transition device. The energy source connects to the stator at the proximal end and powers the transition device. The load switch connects the reactive load to the stator at the distal end. The energy source initially provides an electric current to the stator. The device upon activation heats at least a portion of the stator to reversibly transition the portion from a superconducting state to a non-superconducting state. The stator transfers the electric current as the pulse to the reactive load upon the portion's transition to the non-superconducting state. The stator can be a superconducting helical coil that wraps around the core connected to a superconducting conductor disposed coaxially within the core. Alternatively, the stator can be a stack of superconducting rings disposed coaxially along the core. The superconducting coil and rings can preferably be composed of a high temperature superconductive material on a metal substrate.

Flux compression generator

A method for programming and executing a computer program in an immersive sual programming environment, i.e., virtual reality environment, includes steps for assembling data objects and algorithmic components selected from a set of prefabricated virtual components to construct the computer program, compiling the computer program, and executing the computer program by initiating sequential flow of data objects through the algorithmic components. According to one aspect of the invention, the compiling step is performed while providing visual and audio clues to a user in response to a determined compiler error; the clues indicate the location and nature of the detected compiler error. Additionally, the executing step permits the flow of data objects and the interaction among the data objects to be visually displayed to the user. An apparatus suitable for performing the program and execution of a computer program in a virtual reality environment is also described.

Immersive visual programming system

An optical backplane for use in a high-speed, parallel signal processing tem. A plurality of circularly shaped optical conductors are arranged in a cylindrical topology. A plurality of printed circuit card connectors are disposed radially about the perimeter of the optical conductors. Each connector consists of a linear array of optical transceivers. The lens of each optical transceiver is mounted in a socket provided at the perimeter of each optical conductor. The optical transceivers convert electrical data information from printed circuit boards plugged into the circuit card connectors into optical data information. The optical data information propagates throughout the optical conductor thereby allowing data to be shared by the printed circuit boards.

Optical high-speed parallel backplane

A cylindrical high speed parallel backplane for electrically inter-connecg a plurality of printed circuit boards in a data processing system. A plurality of cylindrical plate conductor structures are arranged parallel to one another. A plurality of circuit board connectors are disposed radially about the perimeter of the plate conductor structures to electrically connect the printed circuit board to the plate conductors structures. This cylindrical design of the backplane provides a short signal path length between the printed circuit boards connected to the backplane thereby providing for broad bandwidth capability.

High speed parallel backplane

An active radar stealth device mounted on a host platform for minimizing radar cross-section of the host platform. A coating which is essentially microwave transparent is attached to the surface of a host platform and is exposed to an incident microwave field. A plurality of detector/emitter pairs contained within the coating detect and actively cancel, respectively, the microwave field at each respective detector/emitter pair.

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Dahlgren, VA, United States of America

Albert J Corda