Gm Global Technolgoy Operations, Inc.

Hrl Laboratories, LLC

Hughes Aircraft Company

The Boeing Company

Raytheon Company

United States of America As Represented by the Secretary of the Air Force

Hughes Electronics Corporation

Albert E Cosand

Peter Petre

Zhiwei A Xu

Cynthia D Baringer

Timothy J Talty

James Chingwei Li

Mohiuddin Ahmed

Yen-Cheng Kuan

Joseph F Jensen

Andrew J MacDonald

Gopal Raghavan

Donald A Hitko

Susan L Morton

Emilio A Sovero

Michael W Yung

Hsuanyu Pan

Richard H Wyles

A circuit biases an input transistor by using a voltage on a reference transistor having open gate connection and operating at the same current density as the input transistor to null current leakage at the gate of the input transistor. The input transistor is biased based on the voltage on the zero-gate-current reference transistor. The bias condition for the input transistor to operate at a zero gate current is determined by leaving the gate terminal of the reference transistor open-circuited, thus zero gate current, forcing a desired current through the reference transistor, and measuring a drain-source voltage of the reference transistor. When the input terminal of the input transistor has an ancillary circuitry that may contribute gate leakage current, the same ancillary circuitry can be coupled to the gate of the reference transistor.

Circuit and method for biasing transistor

Delta sigma modulator

An auto-zeroed charge transfer circuit uses an output MOS transistor having a gate, a source and a drain; the gate of the MOS transistor being maintained to a predetermined control voltage and the drain of the MOS transistor being connected by default to a current sink; and a control circuit arranged to, in response to an input signal, bring the MOS transistor to a non-conductive state where any drop in voltage of the MOS transistor source causes the MOS transistor to conduct and, after connecting the drain of the MOS transistor away from the current sink and to an output node, pull down the source of the MOS transistor until a predetermined charge is sent to the output node through the MOS transistor.

Auto-zeroed charge transfer circuit

A cellular radio architecture that includes a programmable bandpass sampling radio frequency front-end and an optimized digital baseband. The architecture includes a receiver module having a plurality of signal channels for different frequency bands, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture also includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to analog transmit signals, where the transmitter module includes a power amplifier and a switch for directing the transmit signals to one of the signal paths. The architecture also includes a dual self-cancellation circuit providing digital and analog cancellation of the transmit signal in the receiver module.

Dynamic range of wideband RF front end using delta sigma converters with envelope tracking and injected digitally equalized transmit signal

A cellular radio architecture that includes a multiplexer coupled to an antenna structure and including multiple signal paths, where each signal path includes a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals. The architecture also includes a receiver module having a separate signal channel for each of the signal paths in the multiplexer, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The delta-sigma modulator includes an LC filter having a plurality of LC resonator circuits, a plurality of transconductance amplifiers and a plurality of integrator circuits, where a combination of one resonator circuit, transconductance amplifier and integrator circuit represents a two-order stage of the LC filter.

Software programmable, multi-segment capture bandwidth, delta-sigma modulators for flexible radio communication systems

A cellular radio architecture for a vehicle that includes a receiver module having a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture further includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to analog transmit signals. Portions of the receiver and transmitter modules are fabricated with indium phosphide (InP) technologies and portions of the receiver and transmitter modules are fabricated with CMOS technologies.

Optimized data converter design using mixed semiconductor technology for cellular communications

A cellular radio architecture for a vehicle that includes a triplexer coupled to an antenna structure and including three signal paths, where each signal path includes a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals. The architecture also includes a receiver module having a separate signal channel for each of the signal paths in the triplexer, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The delta-sigma modulator includes an LC filter having a plurality of LC resonator circuits, a plurality of transconductance amplifiers and a plurality of integrator circuits, where a combination of one resonator circuit, transconductance amplifier and integrator circuit represents a two-order stage of the LC filter.

Software programmable, multi-segment capture bandwidth, delta-sigma modulators for cellular communications

An RF transmitter module for a cellular radio that includes a delta-sigma modulator having a plurality of interleaving dynamic element matching (DEM) circuits providing interleaved digital bits at a reduced clock rate. An interleaver controller controls the DEM circuits so as to provide groups of the digital bits at different points in time. In one embodiment, a summation junction adds the groups of the digital bits to provide a continuous stream of the interleaved digital bits, a DAC converts the stream of interleaved digital bits to an analog signal, and a power amplifier amplifies the analog signal.

High oversampling ratio dynamic element matching scheme for high dynamic range digital to RF data conversion for radio communication systems

A cellular radio architecture for a vehicle that includes a programmable bandpass sampling radio frequency front-end and an optimized digital baseband. The architecture includes a triplexer having signal paths that include a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals. The architecture also includes a receiver module having a separate signal channel for each of the signal paths in the triplexer, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture further includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to analog transmit signals, where the transmitter module includes a power amplifier and a switch for directing the transmit signals to one of the signal paths in the triplexer.

Software programmable cellular radio architecture for telematics and infotainment

A cellular radio architecture that includes a receiver module having a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture further includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to analog transmit signals. Portions of the receiver and transmitter modules are fabricated with silicon germanium (SiGe) technologies and portions of the receiver and transmitter modules are fabricated with CMOS technologies.

Optimized data converter design using mixed semiconductor technology for flexible radio communication systems

A transceiver front-end circuit for a cellular radio architecture for a vehicle, where the transceiver circuit employs components for reducing power consumption. The transceiver circuit includes a receiver module having a delta-sigma modulator that converts analog receive signals to a representative digital signal in an interleaving process, where the delta-sigma modulator includes a combiner, a low noise amplifier (LNA), an LC filter and a quantizer circuit. The LC filter is a multi-order filter and the quantizer circuit is an interleaving quantizer circuit that interleaves multiple groups of bits from the filter. The order of the LC filter is selectively reduced in situations where a full dynamic range of the cellular radio is not required and a bit resolution of the quantizer circuit is reduced so as to reduce the power requirements of the cellular radio.

Transceiver front-end circuit for a cellular radio that employs components for reducing power consumption

A delta sigma modulator which has improved the dynamic range. The &#x394;&#x3a3; modulator has a plurality of ADCs and a plurality of DACs, the plurality of ADCs and DACs are connected in a loop. The plurality of ADCs are coupled with an incoming analog signal. A clock generator provides a plurality of clock signals which control the plurality of ADCs and the plurality of DACs, the clock signals being offset relative to each other in the time domain thereby enabling each ADC in the plurality of ADCs one at a time and each DAC in the plurality of DACs one at a time so that the &#x394;&#x3a3; modulator processes data in the incoming analog signal in an interleaved fashion. The delta sigma modulator has an Nth order filter in a forward path of the loop.

Interleaved &#x394;-&#x3a3; modulator

A method for reducing power consumption in a transceiver front-end circuit for a cellular radio. The transceiver circuit includes a receiver module having a delta-sigma modulator that converts analog receive signals to a representative digital signal in an interleaving process, where the delta-sigma modulator includes a combiner, a low noise amplifier (LNA), an LC filter and a quantizer circuit. The LC filter is a multi-order filter and the quantizer circuit is an interleaving quantizer circuit that interleaves multiple groups of bits from the filter. The method includes selectively reducing the order of the LC filter in situations where a full dynamic range of the cellular radio is not required and reducing a bit resolution of the quantizer circuit so as to reduce the power requirements of the cellular radio.

Power efficient, variable sampling rate delta-sigma data converters for cellular communications systems

A method for reducing power consumption in a transceiver front-end circuit for a cellular radio. The transceiver circuit includes a receiver module having a delta-sigma modulator that converts analog receive signals to a representative digital signal in an interleaving process, where the delta-sigma modulator includes a low noise amplifier (LNA), an LC filter and a quantizer circuit. The LC filter is a multi-order filter and the quantizer circuit is an interleaving quantizer circuit that interleaves multiple groups of bits from the filter. The method includes selectively reducing the order of the LC filter in situations where a full dynamic range of the cellular radio is not required and reducing a bit resolution of the quantizer circuit so as to reduce the power requirements of the cellular radio.

Power efficient, variable sampling rate delta-sigma data converters for flexible radio communication systems

A cellular radio architecture that includes a programmable bandpass sampling radio frequency front-end and an optimized digital baseband. The architecture includes a multiplexer having signal paths that include a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals. The architecture also includes a receiver module having a separate signal channel for each of the signal paths in the multiplexer, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture further includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to analog transmit signals, where the transmitter module includes a power amplifier and a switch for directing the transmit signals to one of the signal paths in the multiplexer.

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Agoura Hills, CA, United States of America

Albert E Cosand