Qualcomm Incorporated

Albert Danysh

Eric W Mahurin

Erich Plondke

David J Hoyle

Rexford Alan Hill

Aaron Douglass Lamb

Diego Andres Guerra

Butchi Venkata Chaitanya Akondi

Certain aspects of the present disclosure provide techniques and apparatus for hardware-based floating point exponent extraction. Aspects include invoking an instruction in an instruction set architecture (ISA) associated with the one or more processors in order to extract an exponent from a floating point value. Aspects include, in response to the invoking, executing machine code of the instruction using the one or more processors to compute a floor of a base two logarithm of the floating point value to determine the exponent. Aspects include performing one or more actions using the exponent.

Processor instruction for dynamic floating point exponent extraction

A method of constraining data represented in a deep neural network is described. The method includes determining an initial shifting specified to convert a fixed-point input value to a floating-point output value. The method also includes determining an additional shifting specified to constrain a dynamic range during converting of the fixed-point input value to the floating-point output value. The method further includes performing both the initial shifting and the additional shifting together to form a dynamic, range constrained, normalized floating-point output value.

Constraining function approximation hardware integrated with fixed-point to floating-point conversion

A processor includes an integer multiplier configured to execute an integer multiply instruction to multiply significand bits of at least one floating point operand of a floating point multiply operation. The processor also includes a floating point multiplier configured to execute a special purpose floating point multiply accumulate instruction with respect to an intermediate result of the floating point multiply operation and the at least one floating point operand to generate a final floating point multiplication result.

System and method of floating point multiply operation processing

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Austin, TX, United States of America

Albert Danysh