Texas Instruments Corporation

Alan Stephen Bass

Mark William Morgan

Julie Hwang

Woo Jin Kim

Anant Shankar Kamath

Kevin M Ovens

Stephen R Schenck

Shailendra Kumar Baranwal

Robert C Martin

Abhijeeth Aarey Premanath

Jay A Maxey, Jr

Vighnesh Rudra Das

One example includes a switch circuit. The switch circuit includes a transistor configured to activate in response to an activation voltage at an activation terminal of the transistor. The switch circuit also includes a current source coupled to the activation terminal and being configured to generate an activation current. The switch circuit further includes a driver control circuit interconnecting the activation terminal and a voltage rail. The driver control circuit includes digital counter logic configured to cycle through a predetermined number of count values based on an oscillator signal. The driver control circuit is configured to adjust an amplitude of the activation voltage at each of the predetermined number of count values based on the activation current to provide a soft-start activation of the transistor.

Soft-start switch circuit

A bidirectional repeater and data multiplexer for serial data has A-sideC port devices A-Acoupled to comparators-and pull-downs to ground-. Comparator outputs are coupled responsive to select lines S-Sof N:1 Selectto terminal Aof bidirectional controlto control pull-down to non-zero low voltage Vpat B-side device B. An inverting comparatorcoupled to terminal Bof bidirectional controlresponds to input threshold voltage Vt less than low voltage Vp, to prevent data lockup due to data flowback to devices A-A. Output data from comparatoris coupled responsive to select lines S-Sof 1:N Selectto control pull-downs-. This selectively repeats routing of device A-Adata to device B. Data from device B is selectively routed to pull-downs of devices A-A

Bidirectional data repeater switch

A bidirectional repeater and data multiplexer for serial data has A-side I2C port devices A-Acoupled to comparators-and pulldowns to ground-. Comparator outputs are coupled responsive to select lines S-Sof N:l Selectto terminal Aof bidirectional controlto control pulldown to non-zero low voltage Vpat B-side device B. An inverting comparatorcoupled to terminal Bof bidirectional controlresponds to input threshold voltage Vt less than low voltage Vp, to prevent data lockup due to data flowback to devices A-A. Output data from comparatoris coupled responsive to select lines S-Sof 1:N Selectto control pulldowns-. This selectively repeats routing of device A-Adata to device B. Data from device B is selectively routed to pulldowns of devices A-A

A differential receiver circuit includes: a current source a differential pair and coupled to the current source a first transistor coupled to a first branch of the differential pair and a second transistor coupled to a second branch of the differential pair and the first and second transistors and are cross coupled; a third transistor coupled in series with the first transistor a fourth transistor coupled in series with the second transistor a fifth transistor coupled in parallel with the first and third transistors and and a sixth transistor coupled in parallel with the second and fourth transistors and

High frequency differential receiver

A process variance detection technique for detecting fabrication processing variances in integrated circuit components, such as resistors or MOSFETs, is based on the decreased sensitivity to processing variations exhibited by components that are up-sized relative to similar components with nominal dimensions. Detection circuitry includes detection components with both nominal and up-sized dimensions, and variance detection involves detecting the differences in operational response of the nominal and up-sized detection components. For bipolar logic, resistors are fabricated with up-sized widths, while for MOS logic, MOSFETs are fabricated with up-sized gate lengths.

On-chip variance detection for integrated circuit devices

A circuit that translates one voltage level to another voltage level. In one embodiment of the invention, an input buffer translates a 3 volt level to a 5 volt level. Such an input buffer facilitates communications between 3 volt I/Os and 5 volt core logic and memories. And while the input buffer is described as being ideal for communications between 3 volt I/Os and 5 volt core logic and memories of a gate array, the translator circuitry of the invention can be used in a wide variety of electronic devices where a chip operating on 5 volts must interface with a 3 volt system.

3V to 5V receiver/translator using a 5V supply and a 3V reference

There is disclosed a temperature compensated reference voltage generation circuit and method adapted to maintain a specific temperature/voltage relationship. The circuit is designed such that it can easily be adapted to switch between different voltage temperature requirements simply by adjusting the parameters of a few circuit elements. The circuit relies upon three different current generators, each performing a different function.

Voltage reference having steep temperature coefficient and method of

There is disclosed a circuit and method for converting on/off logic signals from one medium to on/off signals useful in a different medium. The circuit is particularly adapted to translate from negative voltage levels to positive voltage levels. The circuit includes voltage control levels for precisely controlling voltage as a function of temperature, all while only using positive voltage levels on the conversion circuit.

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Plano, TX, United States of America

Alan Stephen Bass