Hewlett-packard Company

Other

Hewlett-packard Development Company, L.p.

Alan R Desroches

Karen Lo

Domingo A Figueredo

Jeffery A Benis

Methods and apparatus for halting the data strobes transmitted over a source synchronous link to enable the data stored in the data capture flip-flops in a source synchronous receiver to be scanned out for subsequent analysis. This allows for the evaluation of the captured data without placing additional components in the functional data path and, therefore, without increasing the latency of the transmission. To provide optimal timing margins the data and data strobe paths are logically and electrically matched. This includes routing the data and data strobe signals in close proximity from the transmitter to the receiver, and through the same logical and physical elements in the transmitter and receiver. This insures that any injected link noise is experienced common-mode. In addition, the data strobe signal is preferably driven at one-half of the period of the data signal so that the data strobe and data signals experience logical state transitions at the same time and at the same frequency. This insures maximally similar electrical modes on the communication link, further maximizing link margin.

Source synchronous link with data and clock signals having the same electrical characteristics

A voltage divider suppresses noise in a voltage divider output by filtering the voltages at the gate terminals of the transistors that comprise a voltage divider. In one embodiment of the present invention, a voltage divider includes a PFET transistor coupled between a voltage VDD and the voltage divider output, and an NFET transistor coupled between a voltage VSS and the voltage divider output, with a resistor-capacitor (RC) filter provided at each gate terminal of each of the transistors. In a second embodiment, the RC filter is fabricated using only transistors. In both embodiments, noise is filtered out at the gate terminal of the transistors, thereby eliminating noise in the resulting voltage divider output. Accordingly, a capacitor is not required between the voltage divider output and VSS, as in the prior art.

Circuit having increased noise immunity and capable of generating a reference voltage or terminating a transmission line

A driver circuit compensates for skin effect losses in a transmission line by using a lower impedance when data switches at the maximum switching rate, and using a higher output impedance when data switches at less than the maximum switching rate. As is known in the art, skin-effect resistance causes the impedance of a transmission line to be higher for high-frequency components. A driver in accordance with the present invention compensates for this effect by lowering the output impedance of the driver when transmitting high-frequency components having alternating data values, and using a higher output impedance when transmitting low frequency components having consecutive data values. When transmitting low-frequency consecutive high or low data values using a higher output impedance, the resulting voltage divider formed by the output impedance of the driver at the beginning of the transmission line and the termination resistors at the end of the transmission line causes the high and low DC levels at the end of the transmission line to move closer to the detection threshold of the receiver circuit, thereby causing the next isolated low or high pulse, respectively, to start from a point closer to the threshold. Furthermore, when transmitting high-frequency alternating values at the maximum switching rate using a lower output impedance, the resulting voltage divider produces a larger signal swing in the signal received by the receiver circuit. The result is that all pulses cross the receiver threshold with an excellent &ldquo;eye opening&rdquo;, thereby ensuring detection by the receiver circuit.

Driver circuit that compensates for skin effect losses

A flexible and efficient integrated circuit chip that includes pad drivers for driving an impedance of a transmission line, wherein the integrated circuit further includes all additional circuitry to automatically adjust a matching impedance of the pad drivers. The integrated circuit chip includes a set of selectively activatable pad drivers and a counter coupled with the drivers for selectively activating an initial number of members of the set of the pad drivers to drive the transmission line with a test pulse. The integrated circuit chip further includes a comparator having a first input for sensing a voltage amplitude of the test pulse and a second input coupled with a voltage reference for comparing the voltage amplitude of the test pulse with the reference voltage. An output of the comparator is coupled with the counter for increasing the counter's initial number of selected members of the set of the pad drivers if the voltage amplitude of the test pulse is less than the reference voltage. Such iterative capabilities of the invention provide an automatic optimal selection of the pad drivers, so that the parallel impedance of the activated drivers provides a good match with the impedance of the transmission line.

Transmission line driver with self adjusting output impedance

A power supply detector circuit contained on an integrated circuit for generating an output signal changing from a first state to a second state when the power supply obtains a predetermined voltage level. The output signal being used to preset electronic circuitry on the integrated circuit to an initialized state. The power supply detector circuit being able to generate the output preset signal when the power supply voltage is turned on shortly after being turned off.

Power supply detect circuit operable shortly after an on/off cycle of

An interchip high speed I/O circuit having a low voltage swing and on-chip transmission line terminations. The present invention provides a high speed I/O circuit that uses a small voltage swing to keep power dissipation in the overall system to a minimum and particularly in the transmission line termination loads. A differential receiver circuit compares a data signal input to a reference signal, both sent from a driver chip, to determine the appropriate output response. Both the data signal and the reference signal are current controlled which reduces the di/dt noise generated by parasitic inductances.

High speed I/O circuit having a small voltage swing and low power

The effective parasitic end resistance of small-value precision integrated circuit resistors is reduced by providing N resistors connected in parallel and causing at least two of the resistors to share a terminal contact. The resulting integrated circuit resistor includes multiple terminal contacts of any number n greater than two. Of the n terminal contacts, N-1 terminal contacts are shared amongst said resistors. The parasitic end resistances are diminished by a factor equal to the number of resistors connected in parallel. By increasing the length of the active area of the N resistors by a factor equal to the number of the resistors, the desired resistance value remains undiminished. As a result, the parasitic end resistances may be made negligible compared to the desired resistance even for small value resistors.

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San Jose, CA, United States of America

Alan R Desroches