Iowa State University Research Foundation Inc

Alan Paul Constant

Howard R Shanks

Stanley G Burns

Bruce Allan Cook

Allen R Landin

David H Schmidt

Carl Gruber

Yun Tian

Joel Lee Harringa

Alan Mark Russell

John Evan Snyder

Palaniappa A Molian

A neutron detecting and method of use for a semiconducting material having a formula of M1M2Bwhere M1 is aluminum, magnesium, silver, sodium or scandium and M2 is boron, chromium, erbium, holmium, lithium, magnesium, thulium, titanium, yttrium, or gadolinium.

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Performance and reliability of microelectromechanical system (MEMS) components enhanced dramatically through the incorporation of protective thin film coatings. Current-generation MEMS devices prepared by the LIGA technique employ transition metals such as Ni, Cu, Fe, or alloys thereof, and hence lack stability in oxidizing, corrosive, and/or high temperature environments. Fabrication of a superhard, self-lubricating coating based on a ternary boride compound AlMgBis described in this letter as a potential breakthrough in protective coating technology for LIGA microdevices. Nanoindentation tests show that hardness of AlMgBfilms prepared by pulsed laser deposition ranges from 45 GPa to 51 GPa, when deposited at room temperature and 573 K, respectively. Extremely low friction coefficients of 0.04-0.05, which are thought to result from a self-lubricating effect, have also been confirmed by nanoscratch tests on the AlMgBfilms. Transmission electron microscopy studies show that the as-deposited films are amorphous, regardless of substrate temperature; however, analysis of FTIR spectra suggests that the higher substrate temperature facilitates formation of the Bicosahedral framework, therefore leading to the higher hardness.

An integrated thin film transistor on insulator circuit made up of a number of thin film transistors formed with small feature size and densely packed so as to allow interconnection as a complex circuit. An insulating substrate, preferably flexible, serves as the support layer for the integrated circuit. Control gate metallization is carried on the insulating substrate, a dielectric layer is deposited over the control gate, and an amorphous silicon layer with doped source and drain regions deposited on the dielectric layer. Trenches are formed to remove the amorphous silicon material between transistors to allow highly dense circuit packing. An upper interconnect level which forms connections to the source and drain and gate regions of the thin film transistors, also interconnects the transistors to form more complex circuit structures. Due to the dense packing of the transistors allowed by the trench isolation, the interconnecting foils can be relatively short, increasing the speed of the circuit.

Method of making amorphous silicon on insulator VLSI circuit structures

Amorphous silicon on insulator VLSI circuit structures

Growing community of inventors

Ames, IA, United States of America

Alan Paul Constant