Lam Research Corporation

Ontrak Systems, Inc.

Other

Alan John Jensen

Jengyi Yu

Samantha S H Tan

Seongjun Heo

Brian Scott Thornton

Peter Renteln

Chen-Wei Liang

Gerardo Delgadino

Tom K Choi

Jeffrey J Farber

Lynn S Ryle

Eugene Yuexing Zhao

William Dyson, Jr

Mario Stella

Xin Zhang

Norman A Mertke

Patrick Paino

Cangshan Xu

Travis R Taylor

Robert Charatan

David M Schaefer

Michael S Lacy

Bhaskar Nagabhirava

Helmuth W Treichel

Ananth Indrakanti

Daniel Le

Allan M Radman

Cristian Paduraru

Robert G Boehm

Leonid Romm

Eric A Dunton

David S Lamb

Tin oxide films are used as spacers and hardmasks in semiconductor device manufacturing. In one method, tin oxide layer (e.g., spacer footing) needs to be selectively etched in a presence of an exposed silicon-containing layer, such as SiOC, SiON, SiONC, amorphous silicon, SiC, or SiN. In order to reduce damage to the silicon-containing layer the process involves passivating the silicon-containing layer towards a tin oxide etch chemistry, etching the tin oxide, and repeating passivation and etch in an alternating fashion. For example, passivation and etch can be each performed between 2-50 times. In one implementation, passivation is performed by treating the substrate with an oxygen-containing reactant, activated in a plasma, and the tin oxide etching is performed by a chlorine-based chemistry, such as using a mixture of Cland BCl.

Alternating etch and passivation process

A method for forming a semiconductor device in a plasma processing chamber is provided. An atomic layer etch selectively etches SiO with respect to SiN and deposits a fluorinated polymer. The fluorinated polymer layer is stripped, comprising flowing a stripping gas comprising oxygen into the plasma processing chamber, forming a plasma from the stripping gas, and stopping the flow of the stripping gas. A SiN layer is selectively etched with respect to SiO and SiGe and Si.

Dielectric contact etch

A method for selectively etching SiO and SiN with respect to SiGe or Si of a structure is provided. A plurality of cycles of atomic layer etching is provided, where each cycle comprises a fluorinated polymer deposition phase and an activation phase. The fluorinated polymer deposition phase comprises flowing a fluorinated polymer deposition gas comprising a fluorocarbon gas, forming the fluorinated polymer deposition gas into a plasma, which deposits a fluorocarbon polymer layer on the structure, and stopping the flow of the fluorinated polymer deposition gas. The activation phase comprises flowing an activation gas comprising an inert bombardment gas and H, forming the activation gas into a plasma, wherein the inert bombardment gas activates fluorine in the fluorinated polymer which with the plasma components from Hcause SiO and SiN to be selectively etched with respect to SiGe and Si, and stopping the flow of the activation gas.

Hydrogen activated atomic layer etching

An all-in-one trench-over-via etch wherein etching of a low-k material beneath a metal hard mask of titanium nitride containing material is carried out in alternating steps of (a) etching the low-k material while maintaining chuck temperature at about 45 to 80&#xb0; C. and (b) metal hard mask rounding and Ti-based residues removal while maintaining chuck temperature at about 90 to 130&#xb0; C.

Pulsed dielectric etch process for in-situ metal hard mask shape control to enable void-free metallization

Atomic oxygen generated in oxygen stripping plasmas reacts with and damages low-k dielectric materials during stripping of dielectric post etch residues. While damage of low-k dielectric materials during stripping of dielectric post etch residues is lower with hydrogen stripping plasmas, hydrogen stripping plasmas exhibit lower strip rates. Inclusion of oxygen in a hydrogen stripping plasma improves both photoresist strip rate and uniformity, while maintaining a hydrogen to oxygen ratio avoids low-k dielectric material damage.

Gas mixture for removing photoresist and post etch residue from low-k dielectric material and method of use thereof

A method and apparatus for pre-conditioning a polishing pad for use in chemical mechanical planarization of semiconductor wafers is described. The apparatus includes a pre-conditioning member having a smooth surface. The method includes providing a pre-conditioning member having a smooth surface, pressing the pre-conditioning member against the polishing pad while moving the polishing pad, and flattening the surface of the polishing pad until a polishing pad flatness is achieved that may be used to achieve a desired semiconductor wafer planarity.

Method and apparatus for controlling CMP pad surface finish

A method and apparatus for conditioning a polishing pad is described, wherein the polishing pad has a polishing surface for polishing the semiconductor wafer. The method includes positioning a sonic energy generator above the polishing surface of the polishing pad, and applying sonic energy to the polishing surface of the polishing pad. The apparatus a sonic energy generator adapted to be positioned above the polishing surface, the sonic energy generator including a transducer, and a liquid carrier in flow communication with the transducer, wherein the transducer transmits sonic energy into the liquid carrier and the liquid carrier is applied to the polishing surface of the polishing belt.

Method and apparatus for conditioning a polishing pad with sonic energy

A platen is provided for use in a chemical mechanical planarization (CMP) system. The platen includes at least one fluid output zone having a plurality of fluid outlets, the at least one fluid output zone being disposed below a polishing pad and being capable of providing fluid pressure to the polishing pad. The platen also includes at least one fluid input zone having a plurality of fluid inlets, the at least one fluid input zone being disposed below the polishing pad and being capable of removing the fluid pressure. The platen is capable of managing fluid pressure applied to the polishing pad to achieve a particular polishing profile during a CMP operation.

Fluid venting platen for optimizing wafer polishing

A method and apparatus for conditioning a fixed-abrasive polishing pad used in chemical mechanical planarization of semiconductor wafers is described. The apparatus includes a conditioning member having a smooth surface. The method includes providing a conditioning member having a smooth surface, pressing the conditioning member against the fixed-abrasive polishing pad, and moving the fixed-abrasive polishing pad. In one embodiment, the method further comprises moving the conditioning member perpendicular to the direction of movement of the fixed-abrasive pad to compensate for variations in amounts of exposed abrasive on the fixed-abrasive pad.

Method and apparatus for conditioning fixed-abrasive polishing pads

A CMP polishing pad improves overall material removal rate uniformity by combining multiple polishing pad sections in a serially linked manner, where the polishing pad sections are characterized by at least two different material removal rate profiles. The polishing pad is designed by determining a wafer polishing profile for each of a group of polishing pads where each polishing pad has a unique groove configuration, determining a combination of polishing pad segments, each of the segments constructed with one of the unique groove configurations, that will combine to achieve an improved uniformity in the polishing profile, and manufacturing a polishing pad having pad sections corresponding to the analytically determined pad sections.

Chemical mechanical planarization or polishing pad with sections having varied groove patterns

A method for determining an optimized set of polishing parameters is disclosed. a wafer is polished using one set of polishing parameters, and a first polishing result can then be determined. The wafer is then polished using a second set of polishing parameters, wherein at least one of the first polishing parameters has been changed, and a second polishing result can be determined. The first and second polishing results can then be analyzed to determine an optimized set of polishing parameters. A second wafer can then be polishing using the optimized set of polishing parameters.

Method of optimizing chemical mechanical planarization process

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White Salmon, WA, United States of America

Alan John Jensen