Teradyne, Inc.

Ltx Corporation

Ltx-credence Corporation

Alan J Reiss

Richard Liggiero

Philip Earle Perkins

Gordon B Saksena

A method, circuit, and computer program product for receiving a first intermediate signal that is at least partially based upon a first reference signal. A second intermediate signal is received that is a time-shifted version of the first intermediate signal. An output signal is generated that is based upon the difference between the first intermediate signal and the second intermediate signal. An anticipated differential change in the output signal is determined, the anticipated differential change to occur based upon a transition in the first reference signal. A realized differential change in the output signal is measured, the realized differential change occurring based upon a transition in the first reference signal. The realized differential change in the output signal is compared to the anticipated differential change in the output signal to determine a nonlinearity indicator.

System and method for distortion analysis

The present disclosure relates to a system and method for mapping system transfer functions. Accordingly, some operations may include receiving a first intermediate signal that is at least partially based upon a first reference signal. A second intermediate signal is received that is at least partially based upon a second reference signal. An output signal is generated that is based upon the difference between the first intermediate signal and the second intermediate signal. A first anticipated differential change in the output signal is determined, the first anticipated differential change to occur based upon a transition in the first reference signal. A second anticipated differential change in the output signal is determined, the second anticipated differential change to occur based upon a transition in the second reference signal. Numerous other operations are also within the scope of the present disclosure.

System and method for mapping system transfer functions

A system and method for capturing and evaluating high-speed serial data streams using conventional component testers includes a high-speed latching comparator coupled to the output of a device under test (DUT). The component tester stimulates the DUT to produce a high-speed serial data stream and strobes the latching comparator at predetermined instants of time relative to the serial data stream. In response, the latching comparator samples the digital state of the serial data stream and holds the sampled state. The component tester reads and stores the held state. The tester samples the serial data stream at multiple locations in this fashion, and takes multiple samples at each location. The tester averages the samples acquired at each location to render a probability function of the serial data stream verses time. The probability function has values that vary between zero and one, corresponding to the average value of the digital readings sampled at each point. From the probability function, significant timing characteristics of the serial data stream can be deduced, for example, jitter, intersymbol interference, and eye closure.

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Wayland, MA, United States of America

Alan J Reiss