Other

Ampex Corporation

Efflo Incorporated

Alan G Grace

James W Jones

Walter J Cheney

Janet C Wong

Two power switching transistors have their emitter and collector connected together respectively. A high level DC voltage is connected across the transistors. The junction of the two transistors is connected by way of a load sensing resistor to a power bus and to the primary of an auxilary transformer. A secondary of the auxiliary transformer is coupled to the input of a transcondance limiting amplifier whose output is coupled to a drive amplifier. The output of the drive amplifier is coupled to the primary of a timing transformer. Two secondaries of the timing transformer are coupled to the two transistors respective for providing drive for the transistors. The auxiliary transformer, transconductance amplifier, drive amplifier, and timing transformer are coupled together in a positive feedback loop forming a high frequency oscillator with the two transistors for converting the DC voltage to a high frequency voltage. A symmetry control circuit is coupled from the secondary of the auxiliary transformer to the output of the transconductance amplifier. A boost transformer is provided having its primary connected across the load sensing resistor and its secondary connected in a series aiding configuration with the primary of the timing transformer.

High frequency power switching circuit

A saturable reactor regulated power supply utilizes a power oscillator to convert line voltage to a higher frequency voltage. The high frequency voltage is passed through the gate windings of a saturable reactor to an output circuit including an output power transformer. A feedback circuit interconnected between the output circuit and control windings of the saturable reactor controls the control winding current in order to pulse modulate the voltage applied to the output circuit. The feedback circuit includes several resistors which are connected to cause a phantom control winding resistance R.sub.c * which is much greater than that of a control winding series resistor R.sub.1. The created phantom resistance R.sub.c * causes the control winding circuit time constant to be substantially less than that which would otherwise be provided by the series resistor R.sub.1 ; whereas, the resistor R.sub.1 determines the control winding power loss.

Broad band saturable reactor regulated power supply

An asynchronous, addressable multiplex system comprises a master station in parallel communication with a number of slave stations. Both the master and slave stations employ independently clocked UAR/T's (universal asynchronous receiver/transmitter) circuits for simultaneous data receiving and transmitting, the UAR/T's communicating directly with one another. The master station includes means for formatting data to be transmitted by its UAR/T into message blocks each several bytes long and intended for a particular slave station whose address is encoded only in the first byte of the block. The message blocks are transmitted separated from one another by gaps which are two bytes long. Each slave station receives all master station message blocks and has means for recognizing the gaps and for then comparing the address in the first byte thereafter with an assigned slave station address. If the addresses correspond, the entire message block is accepted by the slave station. Only in response to a message block being accepted, return message blocks are transmitted by the slave stations UAR/T's to the master station UAR/T, such transmission being limited to an interval defined by an accepted message block and the gap therefollowing, no other return message source identification being required by the master station.

Asynchronous addressable multiplex system

A magnetic disc has a plurality of video track segments for storing distinct fields of video information. A look-up track is provided on the disc and segmented to store indirect address data which may be represented by random numbers, and which are related to the video information fields. Both the look-up track segments and the video track segments are numbered sequentially. Each video track segment is permanently associated with a look-up track segment. A movable transducer is associated with both the video tracks and the look-up track. A counter circuit is provided to indicate periodically the instant look-up segment numbers with respect to the instant position of the rotating cyclical storage device and in synchronism therewith. A first comparator circuit compares an indirect address input request with the indirect addresses recorded on the look-up track. Responsive to an output from the first comparator circuit, a buffer circuit stores an instant look-up segment number and transfers it to a control circuit. A control signal from the control circuit is sent to a transducer positioning device which moves the transducer to the corresponding video track segment. A look-up decoder circuit is designed to sense a first empty segment automatically and periodically. A new video picture information is stored on the video track segment corresponding to that first empty look-up track segment. Data bits are stored on the back porch of the horizontal sync pulses on consecutive lines of the video information. A circuit is provided to extract these data bits and restore the look-up track if accidentally erased.

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San Carlos, CA, United States of America

Alan G Grace