International Business Machines Corporation

Alan Daniel Stigliani

John G Torok

Wiren Dale Becker

Michael F McAllister

Ray Raphy

Charles Kyriakos Vakirtzis

John N Hryckowian

Heidi L Lagares-Vazquez

A method is described by which an electrical path is created between layers on a printed circuit board (PCB) without the use of plated through holes (PTH). Through the use of a liquid solder or conductive epoxy injection fixture, a conductive path is created in pre-drilled holes forming an electrical connection between internal PCB metal layers and surface mounted components without the creation of parasitic stubs on the signal nets.

Method of forming solid vias in a printed circuit board

Wiring structures and methods for integrated circuit designs which are adapted to reduce metal variation effects on launch-capture clock pairs in order to minimize cycle time overlap violations in launch/capture clocking systems are provided, whereby the A/B/C (test/launch/capture) clock wire nets are designed using a five parallel track wire segment, in which the B clock wire is represented as a double track with one metal track and one adjacent isolation/shielding track, the C clock wire is represented as a double track with one metal track and one adjacent isolation/shielding track, and where the A test clock wire is represented as a single track comprising test signal wire disposed between the B and C signal wires.

Wiring methods to reduce metal variation effects on launch-capture clock pairs in order to minimize cycle-time overlap violations

Growing community of inventors

Hopewell Junction, NY, United States of America

Alan Daniel Stigliani