United Microelectronics Corp.

Alan Cheng

Juan-Yuan Wu

Hsueh-Hao Shih

Chia-Hung Kao

A method of manufacturing a field effect transistor with a dual-spacer structure. A substrate having a first device region and a second device region is provided. The first device region comprises a first gate formed over the substrate and the second device region comprises a second gate formed over the substrate. A first dielectric layer is formed over the substrate. A second dielectric layer is formed on the first dielectric layer. A portion of the second dielectric layer is removed to expose a portion of the first dielectric layer in the second device region. A portion of the remaining second dielectric layer is removed to form a first spacer on the second dielectric layer on the sidewall of the first gate. A portion of the first dielectric layer is removed to form a second spacer on the sidewall of the second gate. The first spacer and the remaining second dielectric layer between the first spacer and the first gate together form a third spacer.

Method for manufacturing dual-spacer structure

A method for improving the quality of a deposited layer over a silicon substrate in a selective deposition where the silicon substrate has a native oxide layer thereon. A plasma reaction using a halogen compound as a reactive agent is performed so that the native oxide layer is transformed into a silicon halide layer and then removed at low pressure. A layer of the desired material is formed over the native oxide free silicon substrate surface by selective deposition.

Growing community of inventors

Kaohsiung, Taiwan

Alan Cheng