Intel Corporation

Advanced Micro Devices Corporation

Alan C Folmsbee

Kim R Kokkonen

William J Spaw

Stephen L Domenik

David A Shirgley

Tai Nguyen

Kyoung Kim

A circuit is utilized to reject false edges from a digital input signal to be provided to a digital circuit from a transmission line. The circuit includes circuitry for sensing the rising and falling edges of the signal and programmably filtering those edges such that the proper signal is transmitted to the digital circuit. The circuit also can be utilized at a plurality of power supply voltage ranges to remove such false edges without appreciably affecting the performance thereof.

Waveshaper for false edge rejection of an input signal

An output buffer circuit is provided which significantly reduces ground/Vcc bounce and glitches of signals provided to an integrated circuit. The circuit includes a plurality of transistors for providing a drive potential at the output of the device. The transistors are coupled such that they increase in size from the input to the output of the output buffer circuit. A control circuit provides control signals for sequentially turning off the transistors from the largest to smallest device thereby substantially reducing the Vcc bounce and glitches of the signals provided to the integrated circuit by the output buffer circuit.

Gradual on output buffer circuit including a reverse turn-off apparatus

A low voltage charge pump operable with a low voltage power supply and a clock signal is provided for delivering a final output voltage which is higher than the supply voltage. The low voltage charge pump comprises MOS capacitors formed of MOS devices, each capacitor including a p-well acting as a plate of the respective capacitor. Through this arrangement, the effective area of the capacitor is increased resulting in an increase in capacitance. Therefore, a more efficient charge pumping effect is provided in a low voltage power supply such as 3.3 volts. The p-well of each of the capacitor is driven from ground voltage to one threshold voltage less than the supply voltage to minimize forward bias of the p-wells and the n-type substrates of the MOS devices.

Low voltage charge pumps using p-well driven MOS capacitors

An apparatus for controlling access to a program stored in a read-only memory is described. In one embodiment, the memory includes a random number generator and an encryptor for encrypting random numbers from the generator. A second encryptor which provides identical encryption to the first encryptor is included within the system and is coupled to receive random numbers from the generator. A comparator compares the results from the first and second encryptors and if they are identical, enables the memory. The encryptors are programmable with a 64-bit key and 32-bit random numbers are used. By making the encryption process relatively slow (e.g., one second) many decades are required to break the key.

Authenticated read-only memory

A random number generator is described. The output of two relatively fast digitally controlled oscillators are exclusively ORed and gated by a counter which has a counting rate determined by a relatively slow digitally controlled oscillator. The ORed output is accumulated in the accumulator. During the inactive period of the ORed gate, the counter is preset to a value which is a function of the digital value stored in the accumulator. Further, during this inactive period, selected output lines of the accumulator are also exclusively ORed and gated to shift the accumulated value. The final value of the accumulator is generated as a random number and further provides a seed number for varying the frequency of the two relatively fast oscillators which then provide the foundation for the next random number.

Random number generator for use in an authenticated read-only memory

A shield for an EPROM cell. Generally MOS electrically programmable read-only memories (EPROMs), can be erased by exposure to radiation. Typically, the EPROM is encapsulated in a package which has a transparent lid to allow radiation to pass through the package to erase the EPROM cells. The invented shield protects selected EPROM cells from the radiation and thus prevent these cells from being erased even though the entire EPROM package is subjected to radiation and other EPROM cells are erased. The shielded EPROM cells are useful for discretionary connections such as those needed in redundant memories.

Radiation shield for a portion of a radiation sensitive integrated

A shield for an EPROM cell comprising an upper cover and upstanding elements. Generally MOS electrically programmable read-only memories (EPROMs), can be erased by exposure to radiation. Typically, the EPROM is encapsulated in a package which has a transparent lid to allow radiation to pass through the package to erase the EPROM cells. The invented shield protects selected EPROM cells from the radiation and thus prevent these cells from being erased even though the entire EPROM package is subjected to radiation and other EPROM cells are erased. The shielded EPROM cells are useful for discretionary connections such as those needed in redundant memories.

Radiation shield for an integrated circuit memory with redundant elements

An improved addressing means for single chip memories which include a plurality of redundant lines and associated cells is described. Y address signals are used during programming to select and program redundant X decoders. The redundancy apparatus is implemented without any additional package pins and programming may be performed after packaging. The apparatus includes means for permanently disabling further programming of the redundancy circuitry to prevent inadvertent programming by a user.

Memory redundancy apparatus for single chip memories

An improved addressing means for single chip memories which include a plurality of redundant lines and associated cells is described. Y address signals are used during programming to select and program redundant X decoders. The redundancy apparatus is implemented without any additional package pins and programming may be performed after packaging. The apparatus includes means for permanently disabling all further programming of the redundancy circuitry to prevent inadvertent programming by a user.

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Santa Clara, CA, United States of America

Alan C Folmsbee