Icera, Inc.

Alan Alexander

David Alan Edwards

Philippe Guasch

Disclosed herein is a method of optimizing an executable program to improve instruction cache hit rate when executed on a processor. A method of predicting instruction cache behavior of an executable program is also disclosed. According to further aspects of the present invention, there is provided a software development tool product comprising code which when executed on a computer will perform the method of optimizing an executable program. A linker product and a computer program are also disclosed.

Instruction cache

A method, chip and computer program product for booting from a secondary boot source. In one embodiment, the method includes: (1) retrieving primary boot code from an on-chip primary boot source on the same chip as a processor, the primary boot code comprising at least a boot discovery algorithm for determining the location of an external secondary boot source external to said chip, (2) executing the primary boot code on the processor, including the boot discovery algorithm, thus operating the processor to check each of a plurality of locations to determine the location of the external secondary boot source, (3) retrieving the secondary boot code from the determined location and (4) continuing the booting of the processor by executing the secondary boot code on the processor.

Growing community of inventors

Chipping Sodbury, United Kingdom

Alan Alexander