Texas Instruments Corporation

Alain Vallauri

Ilyas Berk Guvelioglu

Joergen Boejer

Frederic Boutaud

Jason A Jones

Marc Couvrat

Ajay J Padgaonkar

Mansoor A Chishtie

Yves Masse

An electronic circuit for use with time of arrival signals from a network, including a position determination unit, a first clock, a second clock, and processing circuitry coupled to said first clock, said second clock, and said position determination unit. The processing circuitry is operable to project a relatively-accurate subsequent global time based on said first and second clocks and to then return said relatively-accurate subsequent global time to said position determination unit to facilitate a subsequent position determination by said position determination unit.

Satellite (GPS) assisted clock apparatus, circuits, systems and processes for cellular terminals on asynchronous networks

A wireless circuit () for tracking an incoming signal and for use in a network () having handover from one part (Cell A) of the network to another part (Cell B). The wireless circuit includes a processor (CE) responsive to the incoming signal, the processor (CE) operable to generate pulse edges representing network-based receiver synchronization instances (RSIs), and a timekeeping circuitry () including an oscillator circuitry (), the timekeeping circuitry () operable to maintain a set of counter circuitries (-) including a counter circuitry () operable to maintain at least one network time component based on the RSIs and another counter circuitry () operable at least during handover and during loss of network coverage for maintaining at least one internal time component (NC) based on the oscillator circuitry (), the set of counter circuitries (-) operable to account for elapsing time substantially gaplessly and substantially without overlap between the time components during a composite of network coverage, loss of network coverage and handover, and the timekeeping circuitry further including a time generator () for combining the time components from the set of counter circuitries (-) to generate an approximate absolute time (SGTB). Other electronic circuits, positioning systems, methods of operation, and processes of manufacture are also disclosed and claimed.

An electronic device for transferring data between a serial port and a memory of a CPU is provided having a plurality of data registers for transferring data between said serial port and said memory in response to a first set of control signals, a data bus connected to said registers and said memory for passing data to and from said memory in response to a portion of said first set of control signals, first control circuitry for generating said first set of control signals and for generating at least one interrupt to said CPU, at least one control register connected to said first control circuitry for providing mode control information to said first control circuitry, a plurality of address registers for storing data address, at least one address generator connected to said address registers for automatically generating addresses in response to a second set of control signals, an address bus connected to said address registers, and second control circuitry connected to said address generator, a portion of said control register and said first control circuitry for generating said second set of control signals.

System having registers for receiving data, registers for transmitting

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Colomars, France

Alain Vallauri