Barefoot Networks, Inc.

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Anurag Agrawal

Chaitanya Kodeboyina

Parag Dattatraya Bhide

Jeongkeun Lee

Changhoon Kim

Srivathsa Dhruvanarayan

Xiaozhou Li

Remy Chang

Georgios Nikolaidis

Joon-Myung Kang

Ramkumar Krishnamoorthy

Andre Lam

Ashkan Nikravesh

Embodiments described herein describe a network tester that is configured to perform packet modification at an egress pipeline of a programmable packet engine. A packet stream is received at an egress pipeline of an output port of the programmable packet engine, wherein the output port includes a packet modifier. Packets of the packet stream are modified at the packet modifier. The packet stream including modified packets is transmitted through an egress pipeline of the output port.

Network testing using a programmable packet engine

Some embodiments provide a method for a hardware forwarding element. Based on a set of characteristics of a packet, the method determines to copy a packet to a particular temporary storage of a set of temporary storages of the hardware forwarding element. Based on a property of the particular temporary storage, the method stores only a particular portion of the packet in the particular temporary storage. A same size portion of each packet copied to the particular temporary storage is stored in the particular temporary storage.

Storing packet data in mirror buffer

Some embodiments provide a method for a network forwarding integrated circuit (IC). The method receives packet data with an instruction to copy a portion of the packet data to a temporary storage of the network forwarding IC. The portion is larger than a maximum entry size of the temporary storage. The method generates a header for each of multiple packet data sections for storage in entries of the temporary storage, with each packet data section including a sub-portion of the packet data portion. The method sends the packet data sections with the generated headers to the temporary storage for storage in multiple separate temporary storage entries.

Copying packet data to mirror buffer

Some embodiments of the invention provide a novel method and chip design for a forwarding chip, that decouples input-output (IO) technology requirements from the technology used in a high bandwidth switching ASIC. In some embodiments, a main die including a latest generation switching chip is coupled to a set of IO dies (e.g., SerDes dies). The main die, in some embodiments, uses a latest technology (e.g., 7 nm nodes) while the IO dies, in some embodiments, use a more mature technology (e.g., 16 nm nodes). Some embodiments provide multiple IO dies that each provide connectivity to external components to the high bandwidth switching ASIC (e.g., a core ASIC die). The multiple dies are mounted on a silicon interposer, in some embodiments, using microbumps to make the connections between the dies and the silicon interposer. Additional connections to the pad are made from each die including to general purpose input-output (GPIO) connections. In some embodiments, the main die and the IO dies make all connections through microbumps on the silicon interposer and some microbumps connect to external components using through-silicon vias (TSVs). The microbumps of the main die, in some embodiments, are arranged so that they are mirrored on either side of the main die and rotationally invariant under a 180 degree rotation. IO dies, in some embodiments, are mounted in a first orientation to connect to a first side of the main die and a second rotated (by 180 degrees) orientation to connect to a second opposite side of the main die.

Forwarding element integrated circuit chip with separate I/O and switching tiles

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Mountain View, CA, United States of America

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