Infineon Technologies Austria Ag

Infineon Technologies Americas Corp.

International Rectifier Corporation

Alain Charles

Mohamed Imam

Hyeongnam Kim

Florin Udrea

Ling Ma

Timothy Donald Henson

Niraj Ranjan

Giorgia Longobardi

Hugo R Burke

Kapil Kelkar

Mihir Tungare

Gianluca Camuso

Hamid Tony Bahramian

Jianwei Wan

Chan Kyung Choi

Qin Lei

Shu Yang

Dario Pagnano

Jinming Sun

Chunhui Liu

A semiconductor device includes a type IV semiconductor base substrate, a first type III-V semiconductor layer formed on a first surface of the base substrate, and a second type III-V semiconductor layer with a different bandgap as the first type III-V being formed on the first type III-V semiconductor layer. The semiconductor device further includes first and second electrically conductive device terminals each being formed on the second type III-V semiconductor layer and each being in ohmic contact with the two-dimensional charge carrier gas. The base substrate includes a first highly doped island that is disposed directly beneath the second device terminal and extends to the first surface of the base substrate. The first highly-doped island is laterally disposed between portions of semiconductor material having a lower net doping concentration than the first highly-doped island.

High voltage blocking III-V semiconductor device

In an embodiment, a switching circuit is provided that includes a Group III nitride-based semiconductor body including a first monolithically integrated Group III nitride-based transistor device and a second monolithically integrated Group III nitride based transistor device that are coupled to form a half-bridge circuit and are arranged on a common foreign substrate having a common doping level. The switching circuit is configured to operate the half-bridge circuit at a voltage of at least 300 V.

Switching circuit, gate driver and method of operating a transistor device

There are disclosed herein various implementations of a charge trapping prevention III-Nitride transistor. Such a transistor may be a III-Nitride high electron mobility transistor (HEMT) including a III-Nitride intermediate body situated over a substrate, a channel layer situated over the III-Nitride intermediate body, and a barrier layer situated over the channel layer. The channel layer and the barrier layer are configured to produce a two-dimensional electron gas (2DEG). In addition, the III-Nitride transistor includes a dielectric layer situated over the barrier layer, a gate coupled to the barrier layer, and a drain electrode and a source electrode each extending through the dielectric layer. The drain electrode makes ohmic contact with one or both of the barrier layer and a charge trapping prevention layer situated between the dielectric layer and the barrier layer.

Charge trapping prevention III-Nitride transistor

Disclosed is a power semiconductor device that includes a plurality of source trenches and adjacent source regions. The plurality of source trenches extend from a top surface of a semiconductor substrate into the semiconductor substrate. The power semiconductor device further includes a plurality of gate trenches that extend from the top of the semiconductor substrate into the semiconductor substrate, and are arranged in hexagonal or zigzag patterns. A contiguous formation is created by the plurality of gate trenches, and the plurality of gate trenches separate the plurality of source trenches from one another.

Power semiconductor device with contiguous gate trenches and offset source trenches

A III-Nitride device has a back-gate disposed in a trench and under and in close proximity to the 2 DEG layer and in lateral alignment with the main gate of the device. A laterally disposed trench is also disposed in a trench and under and in close proximity to the drift region between the gate and drain electrodes of the device. The back-gate is connected to the main gate and the field plate is connected to the source electrode. The back-gate can consist of a highly conductive silicon substrate.

III-nitride device with back-gate and field plate for improving transconductance

Growing community of inventors

Compiegne, France

Alain Charles